128 lines
3.9 KiB
C
128 lines
3.9 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_gpt.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.gpt"
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#endif
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief Pointers to GPT bases for each instance. */
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static GPT_Type *const s_gptBases[] = GPT_BASE_PTRS;
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/*! @brief Pointers to GPT clocks for each instance. */
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static const clock_ip_name_t s_gptClocks[] = GPT_CLOCKS;
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t GPT_GetInstance(GPT_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0U; instance < ARRAY_SIZE(s_gptBases); instance++)
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{
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if (s_gptBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_gptBases));
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return instance;
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}
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*!
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* brief Initialize GPT to reset state and initialize running mode.
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*
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* param base GPT peripheral base address.
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* param initConfig GPT mode setting configuration.
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*/
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void GPT_Init(GPT_Type *base, const gpt_config_t *initConfig)
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{
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assert(NULL != initConfig);
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Ungate the GPT clock*/
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(void)CLOCK_EnableClock(s_gptClocks[GPT_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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base->CR = 0U;
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GPT_SoftwareReset(base);
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base->CR =
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(initConfig->enableFreeRun ? GPT_CR_FRR_MASK : 0UL) | (initConfig->enableRunInWait ? GPT_CR_WAITEN_MASK : 0UL) |
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(initConfig->enableRunInStop ? GPT_CR_STOPEN_MASK : 0UL) |
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(initConfig->enableRunInDoze ? GPT_CR_DOZEEN_MASK : 0UL) |
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(initConfig->enableRunInDbg ? GPT_CR_DBGEN_MASK : 0UL) | (initConfig->enableMode ? GPT_CR_ENMOD_MASK : 0UL);
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GPT_SetClockSource(base, initConfig->clockSource);
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GPT_SetClockDivider(base, initConfig->divider);
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}
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/*!
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* brief Disables the module and gates the GPT clock.
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*
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* param base GPT peripheral base address.
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*/
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void GPT_Deinit(GPT_Type *base)
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{
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/* Disable GPT timers */
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base->CR = 0U;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Gate the GPT clock*/
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(void)CLOCK_DisableClock(s_gptClocks[GPT_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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/*!
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* brief Fills in the GPT configuration structure with default settings.
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*
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* The default values are:
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* code
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* config->clockSource = kGPT_ClockSource_Periph;
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* config->divider = 1U;
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* config->enableRunInStop = true;
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* config->enableRunInWait = true;
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* config->enableRunInDoze = false;
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* config->enableRunInDbg = false;
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* config->enableFreeRun = false;
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* config->enableMode = true;
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* endcode
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* param config Pointer to the user configuration structure.
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*/
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void GPT_GetDefaultConfig(gpt_config_t *config)
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{
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assert(NULL != config);
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/* Initializes the configure structure to zero. */
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(void)memset(config, 0, sizeof(*config));
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config->clockSource = kGPT_ClockSource_Periph;
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config->divider = 1U;
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config->enableRunInStop = true;
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config->enableRunInWait = true;
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config->enableRunInDoze = false;
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config->enableRunInDbg = false;
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config->enableFreeRun = false;
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config->enableMode = true;
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}
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