419 lines
14 KiB
C
419 lines
14 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_DAC12_H_
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#define _FSL_DAC12_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup dac12
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief DAC12 driver version 2.1.0. */
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#define FSL_DAC12_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
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/*@}*/
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/*! @brief Define "write 1 to clear" flags. */
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#define DAC12_CR_W1C_FLAGS_MASK (DAC_CR_OVFF_MASK | DAC_CR_UDFF_MASK)
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/*! @brief Define all the flag bits in DACx_CR register. */
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#define DAC12_CR_ALL_FLAGS_MASK (DAC12_CR_W1C_FLAGS_MASK | DAC_CR_WMF_MASK | DAC_CR_NEMPTF_MASK | DAC_CR_FULLF_MASK)
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/*!
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* @brief DAC12 flags.
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*/
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enum _dac12_status_flags
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{
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kDAC12_OverflowFlag = DAC_CR_OVFF_MASK, /*!< FIFO overflow status flag, which indicates that more data has been
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written into FIFO than it can hold. */
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kDAC12_UnderflowFlag = DAC_CR_UDFF_MASK, /*!< FIFO underflow status flag, which means that there is a new trigger
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after the FIFO is nearly empty. */
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kDAC12_WatermarkFlag = DAC_CR_WMF_MASK, /*!< FIFO wartermark status flag, which indicates the remaining FIFO data is
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less than the watermark setting. */
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kDAC12_NearlyEmptyFlag = DAC_CR_NEMPTF_MASK, /*!< FIFO nearly empty flag, which means there is only one data
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remaining in FIFO. */
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kDAC12_FullFlag = DAC_CR_FULLF_MASK /*!< FIFO full status flag, which means that the FIFO read pointer equals the
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write pointer, as the write pointer increase. */
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};
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/*!
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* @brief DAC12 interrupts.
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*/
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enum _dac12_interrupt_enable
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{
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kDAC12_UnderOrOverflowInterruptEnable = DAC_CR_UVIE_MASK, /*!< Underflow and overflow interrupt enable. */
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kDAC12_WatermarkInterruptEnable = DAC_CR_WTMIE_MASK, /*!< Watermark interrupt enable. */
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kDAC12_NearlyEmptyInterruptEnable = DAC_CR_EMPTIE_MASK, /*!< Nearly empty interrupt enable. */
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kDAC12_FullInterruptEnable = DAC_CR_FULLIE_MASK /*!< Full interrupt enable. */
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};
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/*!
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* @brief DAC12 FIFO size information provided by hardware.
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*/
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typedef enum _dac12_fifo_size_info
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{
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kDAC12_FIFOSize2 = 0U, /*!< FIFO depth is 2. */
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kDAC12_FIFOSize4 = 1U, /*!< FIFO depth is 4. */
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kDAC12_FIFOSize8 = 2U, /*!< FIFO depth is 8. */
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kDAC12_FIFOSize16 = 3U, /*!< FIFO depth is 16. */
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kDAC12_FIFOSize32 = 4U, /*!< FIFO depth is 32. */
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kDAC12_FIFOSize64 = 5U, /*!< FIFO depth is 64. */
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kDAC12_FIFOSize128 = 6U, /*!< FIFO depth is 128. */
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kDAC12_FIFOSize256 = 7U, /*!< FIFO depth is 256. */
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} dac12_fifo_size_info_t;
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/*!
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* @brief DAC12 FIFO work mode.
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*/
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typedef enum _dac12_fifo_work_mode
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{
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kDAC12_FIFODisabled = 0U, /*!< FIFO disabled and only one level buffer is enabled. Any data written from this buffer
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goes to conversion. */
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kDAC12_FIFOWorkAsNormalMode = 1U, /*!< Data will first read from FIFO to buffer then go to conversion. */
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kDAC12_FIFOWorkAsSwingMode = 2U /*!< In Swing mode, the FIFO must be set up to be full. In Swing back mode, a
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trigger changes the read pointer to make it swing between the FIFO Full and
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Nearly Empty state. That is, the trigger increases the read pointer till FIFO
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is nearly empty and decreases the read pointer till the FIFO is full. */
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} dac12_fifo_work_mode_t;
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/*!
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* @brief DAC12 reference voltage source.
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*/
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typedef enum _dac12_reference_voltage_source
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{
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kDAC12_ReferenceVoltageSourceAlt1 = 0U, /*!< The DAC selects DACREF_1 as the reference voltage. */
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kDAC12_ReferenceVoltageSourceAlt2 = 1U, /*!< The DAC selects DACREF_2 as the reference voltage. */
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} dac12_reference_voltage_source_t;
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/*!
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* @brief DAC12 FIFO trigger mode.
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*/
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typedef enum _dac12_fifo_trigger_mode
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{
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kDAC12_FIFOTriggerByHardwareMode = 0U, /*!< Buffer would be triggered by hardware. */
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kDAC12_FIFOTriggerBySoftwareMode = 1U, /*!< Buffer would be triggered by software. */
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} dac12_fifo_trigger_mode_t;
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/*!
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* @brief DAC internal reference current source.
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*
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* Analog module needs reference current to keep working . Such reference current can generated by IP itself, or by
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* on-chip PMC's "reference part". If no current reference be selected, analog module can’t working normally ,even when
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* other register can still be assigned, DAC would waste current but no function.
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* To make the DAC work, either kDAC12_ReferenceCurrentSourceAltx should be selected.
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*/
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typedef enum _dac12_reference_current_source
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{
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kDAC12_ReferenceCurrentSourceDisabled = 0U, /*!< None of reference current source is enabled. */
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kDAC12_ReferenceCurrentSourceAlt0 = 1U, /*!< Use the internal reference current generated by the module itself. */
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kDAC12_ReferenceCurrentSourceAlt1 = 2U, /*!< Use the ZTC(Zero Temperature Coefficient) reference current generated
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by on-chip power management module. */
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kDAC12_ReferenceCurrentSourceAlt2 = 3U, /*!< Use the PTAT(Proportional To Absolution Temperature) reference current
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generated by power management module. */
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} dac12_reference_current_source_t;
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/*!
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* @brief DAC analog buffer speed mode for conversion.
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*/
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typedef enum _dac12_speed_mode
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{
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kDAC12_SpeedLowMode = 0U, /*!< Low speed mode. */
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kDAC12_SpeedMiddleMode = 1U, /*!< Middle speed mode. */
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kDAC12_SpeedHighMode = 2U, /*!< High speed mode. */
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} dac12_speed_mode_t;
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/*!
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* @brief DAC12 hardware information.
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*/
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typedef struct _dac12_hardware_info
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{
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dac12_fifo_size_info_t fifoSizeInfo; /*!< The number of words in this device's DAC buffer. */
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} dac12_hardware_info_t;
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/*!
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* @brief DAC12 module configuration.
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*
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* Actually, the most fields are for FIFO buffer.
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*/
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typedef struct
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{
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uint32_t fifoWatermarkLevel; /*!< FIFO's watermark, the max value can be the hardware FIFO size. */
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dac12_fifo_work_mode_t fifoWorkMode; /*!< FIFI's work mode about pointers. */
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dac12_reference_voltage_source_t referenceVoltageSource; /*!< Select the reference voltage source. */
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dac12_fifo_trigger_mode_t fifoTriggerMode; /*! Select the trigger mode for FIFO. */
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/* Analog part configuration. */
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dac12_reference_current_source_t referenceCurrentSource; /*!< Select the reference current source. */
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dac12_speed_mode_t speedMode; /*!< Select the speed mode for conversion. */
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bool enableAnalogBuffer; /*!< Enable analog buffer for high drive. */
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#if !(defined(FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER) && FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER)
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uint32_t currentReferenceInternalTrimValue; /*!< Internal reference current trim value. 3-bit value is available.*/
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#endif /* FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER */
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} dac12_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and de-initialization
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* @{
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*/
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/*!
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* @brief Get hardware information about this module.
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*
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* @param base DAC12 peripheral base address.
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* @param info Pointer to info structure, see to #dac12_hardware_info_t.
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*/
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void DAC12_GetHardwareInfo(DAC_Type *base, dac12_hardware_info_t *info);
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/*!
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* @brief Initialize the DAC12 module.
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*
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* @param base DAC12 peripheral base address.
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* @param config Pointer to configuration structure, see to #dac12_config_t.
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*/
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void DAC12_Init(DAC_Type *base, const dac12_config_t *config);
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/*!
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* @brief Initializes the DAC12 user configuration structure.
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*
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* This function initializes the user configuration structure to a default value. The default values are:
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* @code
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* config->fifoWatermarkLevel = 0U;
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* config->fifoWorkMode = kDAC12_FIFODisabled;
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* config->referenceVoltageSource = kDAC12_ReferenceVoltageSourceAlt1;
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* config->fifoTriggerMode = kDAC12_FIFOTriggerByHardwareMode;
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* config->referenceCurrentSource = kDAC12_ReferenceCurrentSourceAlt0;
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* config->speedMode = kDAC12_SpeedLowMode;
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* config->speedMode = false;
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* config->currentReferenceInternalTrimValue = 0x4;
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* @endcode
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* @param config Pointer to the configuration structure. See "dac12_config_t".
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*/
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void DAC12_GetDefaultConfig(dac12_config_t *config);
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/*!
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* @brief De-initialize the DAC12 module.
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*
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* @param base DAC12 peripheral base address.
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*/
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void DAC12_Deinit(DAC_Type *base);
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/*!
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* @brief Enable the DAC12's converter or not.
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*
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* @param base DAC12 peripheral base address.
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* @param enable Enable the DAC12's converter or not.
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*/
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static inline void DAC12_Enable(DAC_Type *base, bool enable)
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{
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if (enable)
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{
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base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_DACEN_MASK;
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}
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else
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{
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base->CR &= ~DAC_CR_DACEN_MASK;
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}
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}
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/*!
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* @brief Reset all internal logic and registers.
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*
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* @param base DAC12 peripheral base address.
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*/
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static inline void DAC12_ResetConfig(DAC_Type *base)
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{
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base->CR = DAC_CR_SWRST_MASK;
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}
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/*!
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* @brief Reset the FIFO pointers.
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*
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* FIFO pointers should only be reset when the DAC12 is disabled. This function can be used to configure both pointers
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* to the same address to reset the FIFO as empty.
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*
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* @param base DAC12 peripheral base address.
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*/
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static inline void DAC12_ResetFIFO(DAC_Type *base)
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{
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/* FIFO pointers should only be reset when the module is disabled. */
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base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_FIFORST_MASK;
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}
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/* @} */
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/*!
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* @name Status
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* @{
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*/
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/*!
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* @brief Get status flags.
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*
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* @param base DAC12 peripheral base address.
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* @return Mask of current status flags. See to #_dac12_status_flags.
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*/
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static inline uint32_t DAC12_GetStatusFlags(DAC_Type *base)
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{
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return (DAC12_CR_ALL_FLAGS_MASK & base->CR);
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}
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/*!
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* @brief Clear status flags.
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*
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* Note: Not all the flags can be cleared by this API. Several flags need special condition to clear them according to
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* target chip's reference manual document.
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*
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* @param base DAC12 peripheral base address.
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* @param flags Mask of status flags to be cleared. See to #_dac12_status_flags.
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*/
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static inline void DAC12_ClearStatusFlags(DAC_Type *base, uint32_t flags)
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{
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base->CR |= (flags & DAC12_CR_W1C_FLAGS_MASK);
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}
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/* @} */
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/*!
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* @name Interrupts
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* @{
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*/
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/*!
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* @brief Enable interrupts.
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*
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* @param base DAC12 peripheral base address.
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* @param mask Mask value of interrupts to be enabled. See to #_dac12_interrupt_enable.
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*/
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static inline void DAC12_EnableInterrupts(DAC_Type *base, uint32_t mask)
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{
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base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | mask;
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}
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/*!
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* @brief Disable interrupts.
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*
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* @param base DAC12 peripheral base address.
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* @param mask Mask value of interrupts to be disabled. See to #_dac12_interrupt_enable.
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*/
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static inline void DAC12_DisableInterrupts(DAC_Type *base, uint32_t mask)
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{
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base->CR &= ~mask;
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}
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/* @} */
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/*!
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* @name DMA control
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* @{
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*/
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/*!
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* @brief Enable DMA or not.
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*
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* When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented
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* on this module at the same time.
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*/
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static inline void DAC12_EnableDMA(DAC_Type *base, bool enable)
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{
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if (enable)
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{
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base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_DMAEN_MASK;
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}
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else
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{
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base->CR &= ~DAC_CR_DMAEN_MASK;
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}
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}
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/* @} */
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/*!
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* @name Functional feature
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* @{
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*/
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/*!
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* @brief Set data into the entry of FIFO buffer.
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*
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* When the DAC FIFO is disabled, and the one entry buffer is enabled, the DAC converts the data in the buffer to analog
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* output voltage. Any write to the DATA register will replace the data in the buffer and push data to analog conversion
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* without trigger support.
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* When the DAC FIFO is enabled. Writing data would increase the write pointer of FIFO. Also, the data would be restored
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* into the FIFO buffer.
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*
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* @param base DAC12 peripheral base address.
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* @param value Setting value into FIFO buffer.
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*/
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static inline void DAC12_SetData(DAC_Type *base, uint32_t value)
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{
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/* The module is connected internally to a 32-bit interface.
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* For the 8-bit or 16-bit, the write might be ignored. */
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base->DATA = DAC_DATA_DATA0(value);
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}
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/*!
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* @brief Do trigger the FIFO by software.
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*
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* When the DAC FIFO is enabled, and software trigger is used. Doing trigger would increase the read pointer, and the
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* data in the entry pointed by read pointer would be converted as new output.
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*
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* @param base DAC12 peripheral base address.
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*/
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static inline void DAC12_DoSoftwareTrigger(DAC_Type *base)
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{
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base->CR = (base->CR & ~DAC12_CR_W1C_FLAGS_MASK) | DAC_CR_SWTRG_MASK;
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}
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/*!
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* @brief Get the current read pointer of FIFO.
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*
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* @param base DAC12 peripheral base address.
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* @return Read pointer index of FIFO buffer.
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*/
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static inline uint32_t DAC12_GetFIFOReadPointer(DAC_Type *base)
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{
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return (DAC_PTR_DACRFP_MASK & base->PTR) >> DAC_PTR_DACRFP_SHIFT;
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}
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/*!
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* @brief Get the current write pointer of FIFO.
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*
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* @param base DAC12 peripheral base address.
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* @return Write pointer index of FIFO buffer
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*/
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static inline uint32_t DAC12_GetFIFOWritePointer(DAC_Type *base)
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{
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return (DAC_PTR_DACWFP_MASK & base->PTR) >> DAC_PTR_DACWFP_SHIFT;
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}
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/* @} */
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _FSL_DAC12_H_ */
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