280 lines
7.0 KiB
C
280 lines
7.0 KiB
C
/*
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* Copyright (c) 2022 hpmicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rtdbg.h>
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#ifdef RT_USING_HWTIMER
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#include "drv_hwtimer.h"
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#include "board.h"
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#include "hpm_gptmr_drv.h"
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typedef struct _hpm_gptimer
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{
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GPTMR_Type *base;
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const char *name;
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rt_hwtimer_t timer;
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uint32_t channel;
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clock_name_t clock_name;
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int32_t irq_num;
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} hpm_gptimer_t;
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static void hpm_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state);
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static rt_err_t hpm_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode);
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static void hpm_hwtimer_stop(rt_hwtimer_t *timer);
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static rt_uint32_t hpm_hwtimer_count_get(rt_hwtimer_t *timer);
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static rt_err_t hpm_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args);
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static void hpm_hwtmr_isr(hpm_gptimer_t *gptmr);
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static const struct rt_hwtimer_ops hpm_hwtimer_ops = {
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.init = hpm_hwtimer_init,
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.start = hpm_hwtimer_start,
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.stop = hpm_hwtimer_stop,
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.count_get = hpm_hwtimer_count_get,
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.control = hpm_hwtimer_control
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};
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static const struct rt_hwtimer_info hpm_hwtimer_info = {
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.maxfreq = 100000000UL,
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.minfreq = 93750UL,
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.maxcnt = 0xFFFFFFFFUL,
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.cntmode = HWTIMER_CNTMODE_UP
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};
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#ifdef BSP_USING_GPTMR0
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static hpm_gptimer_t timer0 = {.name = "GPT0", .base = HPM_GPTMR0, .clock_name = clock_gptmr0, .irq_num = IRQn_GPTMR0 };
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#endif
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#ifdef BSP_USING_GPTMR1
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static hpm_gptimer_t timer1 = {.name = "GPT1", .base = HPM_GPTMR1, .clock_name = clock_gptmr1, .irq_num = IRQn_GPTMR1 };
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#endif
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#ifdef BSP_USING_GPTMR2
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static hpm_gptimer_t timer2 = {.name = "GPT2", .base = HPM_GPTMR2, .clock_name = clock_gptmr2, .irq_num = IRQn_GPTMR2 };
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#endif
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#ifdef BSP_USING_GPTMR3
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static hpm_gptimer_t timer3 = {.name = "GPT3", .base = HPM_GPTMR3, .clock_name = clock_gptmr3, .irq_num = IRQn_GPTMR3 };
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#endif
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#ifdef BSP_USING_GPTMR4
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static hpm_gptimer_t timer4 = {.name = "GPT4", .base = HPM_GPTMR4, .clock_name = clock_gptmr4, .irq_num = IRQn_GPTMR4 };
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#endif
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#ifdef BSP_USING_GPTMR5
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static hpm_gptimer_t timer5 = {.name = "GPT5", .base = HPM_GPTMR5, .clock_name = clock_gptmr5, .irq_num = IRQn_GPTMR5 };
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#endif
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#ifdef BSP_USING_GPTMR6
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static hpm_gptimer_t timer6 = {.name = "GPT6", .base = HPM_GPTMR6, .clock_name = clock_gptmr6, .irq_num = IRQn_GPTMR6 };
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#endif
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#ifdef BSP_USING_GPTMR7
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static hpm_gptimer_t timer7 = {.name = "GPT7", .base = HPM_GPTMR7, .clock_name = clock_gptmr7, .irq_num = IRQn_GPTMR7 };
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#endif
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static hpm_gptimer_t *s_gptimers[] = {
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#ifdef BSP_USING_GPTMR0
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&timer0,
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#endif
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#ifdef BSP_USING_GPTMR1
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&timer1,
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#endif
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#ifdef BSP_USING_GPTMR2
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&timer2,
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#endif
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#ifdef BSP_USING_GPTMR3
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&timer3,
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#endif
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#ifdef BSP_USING_GPTMR4
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&timer4,
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#endif
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#ifdef BSP_USING_GPTMR5
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&timer5,
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#endif
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#ifdef BSP_USING_GPTMR6
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&timer6,
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#endif
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#ifdef BSP_USING_GPTMR7
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&timer7,
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#endif
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};
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#ifdef BSP_USING_GPTMR0
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void gptmr0_isr(void)
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{
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hpm_hwtmr_isr(&timer0);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR0, gptmr0_isr);
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#endif
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#ifdef BSP_USING_GPTMR1
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void gptmr1_isr(void)
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{
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hpm_hwtmr_isr(&timer1);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR1, gptmr1_isr);
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#endif
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#ifdef BSP_USING_GPTMR2
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void gptmr2_isr(void)
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{
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hpm_hwtmr_isr(&timer2);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR2, gptmr2_isr);
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#endif
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#ifdef BSP_USING_GPTMR3
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void gptmr3_isr(void)
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{
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hpm_hwtmr_isr(&timer3);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR3, gptmr3_isr);
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#endif
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#ifdef BSP_USING_GPTMR4
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void gptmr4_isr(void)
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{
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hpm_hwtmr_isr(&timer4);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR4, gptmr4_isr);
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#endif
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#ifdef BSP_USING_GPTMR5
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void gptmr5_isr(void)
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{
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hpm_hwtmr_isr(&timer5);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR5, gptmr5_isr);
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#endif
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#ifdef BSP_USING_GPTMR6
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void gptmr6_isr(void)
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{
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hpm_hwtmr_isr(&timer6);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR6, gptmr6_isr);
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#endif
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#ifdef BSP_USING_GPTMR7
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void gptmr7_isr(void)
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{
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hpm_hwtmr_isr(&timer7);
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}
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SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR7, gptmr7_isr);
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#endif
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static void hpm_hwtmr_isr(hpm_gptimer_t *timer)
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{
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uint32_t hwtmr_stat = gptmr_get_status(timer->base);
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if ((hwtmr_stat & GPTMR_CH_CMP_STAT_MASK(0, 0)) != 0U)
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{
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rt_device_hwtimer_isr(&timer->timer);
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gptmr_clear_status(timer->base, GPTMR_CH_CMP_STAT_MASK(0, 0));
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}
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}
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static void hpm_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data;
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GPTMR_Type *base = hpm_gptmr->base;
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gptmr_channel_config_t config;
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if (state == 1)
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{
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hpm_gptmr->timer.freq = board_init_gptmr_clock(base);
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gptmr_channel_get_default_config(base, &config);
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gptmr_channel_config(base, hpm_gptmr->channel, &config, false);
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}
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}
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static rt_err_t hpm_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
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{
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hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*) timer->parent.user_data;
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GPTMR_Type *base = hpm_gptmr->base;
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gptmr_channel_config_t config;
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gptmr_channel_get_default_config(base, &config);
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config.cmp[0] = cnt;
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config.reload = cnt;
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timer->mode = mode;
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gptmr_channel_config(base, hpm_gptmr->channel, &config, true);
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gptmr_clear_status(base, 0xFU);
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gptmr_enable_irq(base, GPTMR_CH_CMP_IRQ_MASK(0, 0));
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gptmr_channel_update_count(base, hpm_gptmr->channel, 0);
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gptmr_start_counter(base, hpm_gptmr->channel);
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intc_m_enable_irq_with_priority(hpm_gptmr->irq_num, 1);
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return RT_EOK;
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}
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static void hpm_hwtimer_stop(rt_hwtimer_t *timer)
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{
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hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data;
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GPTMR_Type *base = hpm_gptmr->base;
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gptmr_stop_counter(base, hpm_gptmr->channel);
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}
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static rt_uint32_t hpm_hwtimer_count_get(rt_hwtimer_t *timer)
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{
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hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data;
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GPTMR_Type *base = hpm_gptmr->base;
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rt_uint32_t current_cnt = gptmr_channel_get_counter(base, hpm_gptmr->channel, gptmr_counter_type_normal);
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return current_cnt;
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}
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static rt_err_t hpm_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
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{
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rt_err_t err = RT_EOK;
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hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*) timer->parent.user_data;
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GPTMR_Type *base = hpm_gptmr->base;
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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err = -RT_ERROR;
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break;
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case HWTIMER_CTRL_INFO_GET:
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*(rt_hwtimer_t*)args = hpm_gptmr->timer;
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break;
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case HWTIMER_CTRL_MODE_SET:
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hpm_gptmr->timer.mode = *(rt_uint32_t*)args;
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break;
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case HWTIMER_CTRL_STOP:
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gptmr_stop_counter(base, hpm_gptmr->channel);
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break;
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}
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return err;
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}
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int rt_hw_hwtimer_init(void)
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{
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int ret = RT_EOK;
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for (uint32_t i = 0; i < ARRAY_SIZE(s_gptimers); i++)
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{
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s_gptimers[i]->timer.info = &hpm_hwtimer_info;
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s_gptimers[i]->timer.ops = &hpm_hwtimer_ops;
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ret = rt_device_hwtimer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]);
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if (ret != RT_EOK)
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{
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LOG_E("%s register failed\n", s_gptimers[i]->name);
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}
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}
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return ret;
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}
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#endif /* BSP_USING_GPTMR */
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