166 lines
4.0 KiB
C
166 lines
4.0 KiB
C
/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/03/02 ShichengChu first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "drv_wdt.h"
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#ifdef BSP_USING_WDT
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#define DBG_LEVEL DBG_LOG
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#include <rtdbg.h>
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#define LOG_TAG "DRV.WDT"
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#define WDT_FREQ_DEFAULT 25000000UL
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#define CVI_WDT_MAX_TOP 15
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struct _cvi_wdt_dev
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{
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struct rt_watchdog_device device;
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const char *name;
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rt_uint32_t base;
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};
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static struct _cvi_wdt_dev _wdt_dev[] =
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{
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#ifdef BSP_USING_WDT0
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{
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.name = "wdt0",
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.base = CVI_WDT0_BASE
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},
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#endif /* BSP_USING_WDT0 */
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#ifdef BSP_USING_WDT1
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{
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.name = "wdt1",
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.base = CVI_WDT1_BASE
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},
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#endif /* BSP_USING_WDT1 */
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#ifdef BSP_USING_WDT2
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{
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.name = "wdt2",
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.base = CVI_WDT2_BASE
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},
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#endif /* BSP_USING_WDT2 */
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};
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struct rt_watchdog_device wdt_device;
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static rt_err_t _wdt_init(rt_watchdog_t *wdt_device)
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{
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cvi_wdt_top_setting();
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return RT_EOK;
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}
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rt_inline int wdt_top_in_ms(unsigned int top)
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{
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/*
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* There are 16 possible timeout values in 0..15 where the number of
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* cycles is 2 ^ (16 + i) and the watchdog counts down.
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*/
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// pr_debug("wdt top in seconds: %d/%d=%d\n", (1U << (16 + top)), chip->clk_hz, (1U << (16 + top)) / chip->clk_hz);
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return (1U << (16 + top)) / (WDT_FREQ_DEFAULT / 1000);
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}
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static rt_err_t csi_wdt_set_timeout(unsigned long reg_base, uint32_t ms)
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{
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rt_err_t ret = RT_EOK;
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int i, top_val = CVI_WDT_MAX_TOP;
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/*
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* Iterate over the timeout values until we find the closest match. We
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* always look for >=.
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*/
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for (i = 0; i <= CVI_WDT_MAX_TOP; ++i)
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if (wdt_top_in_ms(i) >= ms) {
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top_val = i;
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break;
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}
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if (i < CVI_WDT_MAX_TOP)
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{
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/*
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* Set the new value in the watchdog. Some versions of wdt_chip
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* have TOPINIT in the TIMEOUT_RANGE register (as per
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* CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
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* effectively get a pat of the watchdog right here.
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*/
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cvi_wdt_set_timeout(reg_base, top_val);
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cvi_wdt_start_en(reg_base);
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}
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else
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{
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ret = -RT_ERROR;
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}
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return ret;
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}
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static rt_err_t _wdt_control(rt_watchdog_t *wdt_device, int cmd, void *arg)
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{
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RT_ASSERT(wdt_device != RT_NULL);
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struct _cvi_wdt_dev *wdt = rt_container_of(wdt_device, struct _cvi_wdt_dev, device);
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rt_uint32_t reg_base = wdt->base;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_WDT_KEEPALIVE:
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cvi_wdt_feed_en(reg_base);
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break;
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case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
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csi_wdt_set_timeout(reg_base, *(rt_uint32_t *)arg);
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wdt_device->parent.user_data = (rt_uint32_t)(*(rt_uint32_t *)arg);
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break;
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case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
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*(rt_uint32_t *)arg = (rt_uint32_t)wdt_device->parent.user_data;
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break;
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case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
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*(rt_uint32_t *)arg = (cvi_wdt_get_counter_value(reg_base) / (WDT_FREQ_DEFAULT / 1000U));
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break;
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case RT_DEVICE_CTRL_WDT_START:
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cvi_wdt_set_respond_system_reset(reg_base);
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cvi_wdt_start_en(reg_base);
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break;
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case RT_DEVICE_CTRL_WDT_STOP:
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cvi_wdt_start_dis(reg_base);
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break;
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default:
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LOG_W("This command is not supported.");
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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static const struct rt_watchdog_ops _wdt_ops =
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{
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.init = _wdt_init,
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.control = _wdt_control
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};
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int rt_hw_wdt_init(void)
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{
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rt_uint8_t i;
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for (i = 0; i < sizeof(_wdt_dev) / sizeof(_wdt_dev[0]); i ++)
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{
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_wdt_dev[i].device.ops = &_wdt_ops;
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if (rt_hw_watchdog_register(&_wdt_dev[i].device, _wdt_dev[i].name, RT_DEVICE_FLAG_RDWR, RT_NULL) != RT_EOK)
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{
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LOG_E("%s register failed!", _wdt_dev[i].name);
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return -RT_ERROR;
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}
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}
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_hw_wdt_init);
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#endif /* BSP_USING_WDT */
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