mirror of
https://github.com/RT-Thread/rt-thread.git
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1564735b5c
Make a max CS pin value (16) for SPI, that will not alloc `*cs_pins` by malloc, because drivers call `rt_device_unregister` may not free item. Fixup the QSPI init configure member in DM mode. Make SoC Kconfig import easy. Signed-off-by: GuEe-GUI <2991707448@qq.com>
114 lines
2.6 KiB
C
114 lines
2.6 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-12-06 GuEe-GUI first version
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*/
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#include "dev_spi_dm.h"
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#define DBG_TAG "spi.dm"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#ifdef RT_USING_OFW
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static void ofw_parse_delay(struct rt_ofw_node *np, struct rt_spi_delay *delay,
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const char *prop)
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{
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rt_uint32_t value;
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if (!rt_ofw_prop_read_u32(np, prop, &value))
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{
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if (value > RT_UINT16_MAX)
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{
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delay->value = RT_DIV_ROUND_UP(value, 1000);
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delay->unit = RT_SPI_DELAY_UNIT_USECS;
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}
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else
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{
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delay->value = value;
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delay->unit = RT_SPI_DELAY_UNIT_NSECS;
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}
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}
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}
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rt_err_t spi_device_ofw_parse(struct rt_spi_device *spi_dev)
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{
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rt_err_t err;
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rt_uint32_t value, cs[RT_SPI_CS_CNT_MAX];
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struct rt_spi_bus *spi_bus = spi_dev->bus;
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struct rt_ofw_node *np = spi_dev->parent.ofw_node;
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struct rt_spi_configuration *conf = &spi_dev->config;
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if (rt_ofw_prop_read_bool(np, "spi-cpha"))
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{
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conf->mode |= RT_SPI_CPHA;
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}
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if (rt_ofw_prop_read_bool(np, "spi-cpol"))
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{
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conf->mode |= RT_SPI_CPOL;
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}
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if (rt_ofw_prop_read_bool(np, "spi-3wire"))
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{
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conf->mode |= RT_SPI_3WIRE;
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}
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if (rt_ofw_prop_read_bool(np, "spi-lsb-first"))
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{
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conf->mode |= RT_SPI_LSB;
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}
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if (rt_ofw_prop_read_bool(np, "spi-cs-high"))
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{
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conf->mode |= RT_SPI_CS_HIGH;
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}
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value = 1;
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rt_ofw_prop_read_u32(np, "spi-tx-bus-width", &value);
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conf->data_width_tx = value;
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value = 1;
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rt_ofw_prop_read_u32(np, "spi-rx-bus-width", &value);
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conf->data_width_rx = value;
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if (spi_bus->slave)
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{
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if (!rt_ofw_node_tag_equ(np, "slave"))
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{
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LOG_E("Invalid SPI device = %s", rt_ofw_node_full_name(np));
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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value = rt_ofw_prop_read_u32_array_index(np, "reg", 0, RT_SPI_CS_CNT_MAX, cs);
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if ((rt_int32_t)value < 0)
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{
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err = (rt_err_t)value;
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LOG_E("Find 'reg' failed");
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return err;
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}
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for (int i = 0; i < value; ++i)
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{
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spi_dev->chip_select[i] = cs[i];
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}
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if (!rt_ofw_prop_read_u32(np, "spi-max-frequency", &value))
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{
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conf->max_hz = value;
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}
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ofw_parse_delay(np, &spi_dev->cs_setup, "spi-cs-setup-delay-ns");
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ofw_parse_delay(np, &spi_dev->cs_hold, "spi-cs-hold-delay-ns");
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ofw_parse_delay(np, &spi_dev->cs_inactive, "spi-cs-inactive-delay-ns");
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return RT_EOK;
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}
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#endif /* RT_USING_OFW */
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