469 lines
14 KiB
C
469 lines
14 KiB
C
/*
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* Copyright 2019-2021, 2023 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <rtthread.h>
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#include "display_support.h"
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#include "fsl_gpio.h"
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#include "fsl_mipi_dsi.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*
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* The DPHY bit clock must be fast enough to send out the pixels, it should be
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* larger than:
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*
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* (Pixel clock * bit per output pixel) / number of MIPI data lane
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*
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* Here the desired DPHY bit clock multiplied by ( 9 / 8 = 1.125) to ensure
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* it is fast enough.
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*/
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#define DEMO_MIPI_DPHY_BIT_CLK_ENLARGE(origin) (((origin) / 8) * 9)
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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static void BOARD_PullPanelResetPin(bool pullUp);
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static void BOARD_PullPanelPowerPin(bool pullUp);
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static void BOARD_InitLcdifClock(void);
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static void BOARD_InitMipiDsiClock(void);
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static status_t BOARD_DSI_Transfer(dsi_transfer_t *xfer);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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static uint32_t mipiDsiTxEscClkFreq_Hz;
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static uint32_t mipiDsiDphyBitClkFreq_Hz;
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static uint32_t mipiDsiDphyRefClkFreq_Hz;
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static uint32_t mipiDsiDpiClkFreq_Hz;
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const MIPI_DSI_Type g_mipiDsi = {
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.host = DSI_HOST,
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.apb = DSI_HOST_APB_PKT_IF,
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.dpi = DSI_HOST_DPI_INTFC,
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.dphy = DSI_HOST_DPHY_INTFC,
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};
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#if defined(DISPLAY_USING_RK055AHD091)
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static mipi_dsi_device_t dsiDevice = {
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.virtualChannel = 0,
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.xferFunc = BOARD_DSI_Transfer,
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};
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static const rm68200_resource_t rm68200Resource = {
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.dsiDevice = &dsiDevice,
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.pullResetPin = BOARD_PullPanelResetPin,
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.pullPowerPin = BOARD_PullPanelPowerPin,
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};
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static display_handle_t rm68200Handle = {
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.resource = &rm68200Resource,
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.ops = &rm68200_ops,
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};
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#elif defined(DISPLAY_USING_RK055MHD091)
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static mipi_dsi_device_t dsiDevice = {
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.virtualChannel = 0,
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.xferFunc = BOARD_DSI_Transfer,
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};
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static const hx8394_resource_t hx8394Resource = {
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.dsiDevice = &dsiDevice,
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.pullResetPin = BOARD_PullPanelResetPin,
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.pullPowerPin = BOARD_PullPanelPowerPin,
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};
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static display_handle_t hx8394Handle = {
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.resource = &hx8394Resource,
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.ops = &hx8394_ops,
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};
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#elif defined(DISPLAY_USING_RK055IQH091)
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static mipi_dsi_device_t dsiDevice = {
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.virtualChannel = 0,
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.xferFunc = BOARD_DSI_Transfer,
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};
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static const rm68191_resource_t rm68191Resource = {
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.dsiDevice = &dsiDevice,
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.pullResetPin = BOARD_PullPanelResetPin,
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.pullPowerPin = BOARD_PullPanelPowerPin,
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};
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static display_handle_t rm68191Handle = {
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.resource = &rm68191Resource,
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.ops = &rm68191_ops,
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};
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#endif
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#if defined(BSP_USING_LCDIFV2)
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static dc_fb_lcdifv2_handle_t s_dcFbLcdifv2Handle = {0};
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static const dc_fb_lcdifv2_config_t s_dcFbLcdifv2Config = {
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.lcdifv2 = DEMO_LCDIF,
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.width = LCD_MIPI_WIDTH,
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.height = LCD_MIPI_HEIGHT,
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.hsw = LCD_MIPI_HSW,
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.hfp = LCD_MIPI_HFP,
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.hbp = LCD_MIPI_HBP,
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.vsw = LCD_MIPI_VSW,
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.vfp = LCD_MIPI_VFP,
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.vbp = LCD_MIPI_VBP,
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.polarityFlags = DEMO_LCDIF_POL_FLAGS,
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.lineOrder = kLCDIFV2_LineOrderRGB,
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/* CM4 is domain 1, CM7 is domain 0. */
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#if (__CORTEX_M <= 4)
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.domain = 1,
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#else
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.domain = 0,
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#endif
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};
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const dc_fb_t g_dc = {
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.ops = &g_dcFbOpsLcdifv2,
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.prvData = &s_dcFbLcdifv2Handle,
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.config = &s_dcFbLcdifv2Config,
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};
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#elif defined(BSP_USING_ELCDIF)
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dc_fb_elcdif_handle_t s_dcFbElcdifHandle = {0}; /* The handle must be initialized to 0. */
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const dc_fb_elcdif_config_t s_dcFbElcdifConfig = {
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.elcdif = DEMO_LCDIF,
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.width = LCD_MIPI_WIDTH,
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.height = LCD_MIPI_HEIGHT,
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.hsw = LCD_MIPI_HSW,
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.hfp = LCD_MIPI_HFP,
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.hbp = LCD_MIPI_HBP,
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.vsw = LCD_MIPI_VSW,
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.vfp = LCD_MIPI_VFP,
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.vbp = LCD_MIPI_VBP,
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.polarityFlags = DEMO_LCDIF_POL_FLAGS,
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#if (!DEMO_USE_XRGB8888) && (DEMO_USE_LUT8)
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.dataBus = kELCDIF_DataBus8Bit,
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#else
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.dataBus = kELCDIF_DataBus24Bit,
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#endif
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};
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const dc_fb_t g_dc = {
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.ops = &g_dcFbOpsElcdif,
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.prvData = &s_dcFbElcdifHandle,
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.config = &s_dcFbElcdifConfig,
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};
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#endif
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/*******************************************************************************
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* Code
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******************************************************************************/
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static void BOARD_PullPanelResetPin(bool pullUp)
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{
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if (pullUp)
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{
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GPIO_PinWrite(BOARD_MIPI_PANEL_RST_GPIO, BOARD_MIPI_PANEL_RST_PIN, 1);
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}
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else
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{
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GPIO_PinWrite(BOARD_MIPI_PANEL_RST_GPIO, BOARD_MIPI_PANEL_RST_PIN, 0);
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}
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}
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static void BOARD_PullPanelPowerPin(bool pullUp)
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{
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if (pullUp)
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{
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GPIO_PinWrite(BOARD_MIPI_PANEL_POWER_GPIO, BOARD_MIPI_PANEL_POWER_PIN, 1);
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}
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else
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{
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GPIO_PinWrite(BOARD_MIPI_PANEL_POWER_GPIO, BOARD_MIPI_PANEL_POWER_PIN, 0);
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}
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}
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static status_t BOARD_DSI_Transfer(dsi_transfer_t *xfer)
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{
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return DSI_TransferBlocking(DEMO_LCD_MIPI, xfer);
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}
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static void BOARD_InitLcdifClock(void)
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{
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/*
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* The pixel clock is (height + VSW + VFP + VBP) * (width + HSW + HFP + HBP) * frame rate.
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*
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* For 60Hz frame rate, the RK055IQH091 pixel clock should be 36MHz.
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* the RK055AHD091 pixel clock should be 62MHz.
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*/
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const clock_root_config_t lcdifClockConfig = {
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.clockOff = false,
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.mux = 4, /*!< PLL_528. */
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#if (defined(DISPLAY_USING_RK055AHD091) || defined(DISPLAY_USING_RK055MHD091))
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.div = 9,
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#elif defined(DISPLAY_USING_RK055IQH091)
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.div = 15,
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#endif
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};
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#if defined(BSP_USING_LCDIFV2)
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CLOCK_SetRootClock(kCLOCK_Root_Lcdifv2, &lcdifClockConfig);
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mipiDsiDpiClkFreq_Hz = CLOCK_GetRootClockFreq(kCLOCK_Root_Lcdifv2);
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#elif defined(BSP_USING_ELCDIF)
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CLOCK_SetRootClock(kCLOCK_Root_Lcdif, &lcdifClockConfig);
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mipiDsiDpiClkFreq_Hz = CLOCK_GetRootClockFreq(kCLOCK_Root_Lcdif);
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#endif
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}
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static void BOARD_InitMipiDsiClock(void)
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{
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uint32_t mipiDsiEscClkFreq_Hz;
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/* RxClkEsc max 60MHz, TxClkEsc 12 to 20MHz. */
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/* RxClkEsc = 528MHz / 11 = 48MHz. */
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/* TxClkEsc = 528MHz / 11 / 4 = 16MHz. */
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const clock_root_config_t mipiEscClockConfig = {
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.clockOff = false,
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.mux = 4, /*!< PLL_528. */
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.div = 11,
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};
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CLOCK_SetRootClock(kCLOCK_Root_Mipi_Esc, &mipiEscClockConfig);
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mipiDsiEscClkFreq_Hz = CLOCK_GetRootClockFreq(kCLOCK_Root_Mipi_Esc);
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const clock_group_config_t mipiEscClockGroupConfig = {
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.clockOff = false, .resetDiv = 2, .div0 = 2, /* TX esc clock. */
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};
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CLOCK_SetGroupConfig(kCLOCK_Group_MipiDsi, &mipiEscClockGroupConfig);
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mipiDsiTxEscClkFreq_Hz = mipiDsiEscClkFreq_Hz / 3;
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/* DPHY reference clock, use OSC 24MHz clock. */
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const clock_root_config_t mipiDphyRefClockConfig = {
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.clockOff = false,
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.mux = 1, /*!< OSC_24M. */
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.div = 1,
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};
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CLOCK_SetRootClock(kCLOCK_Root_Mipi_Ref, &mipiDphyRefClockConfig);
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mipiDsiDphyRefClkFreq_Hz = BOARD_XTAL0_CLK_HZ;
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}
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static status_t BOARD_InitLcdPanel(void)
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{
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status_t status;
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const gpio_pin_config_t pinConfig = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode};
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const display_config_t displayConfig = {
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.resolution = FSL_VIDEO_RESOLUTION(LCD_MIPI_WIDTH, LCD_MIPI_HEIGHT),
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.hsw = LCD_MIPI_HSW,
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.hfp = LCD_MIPI_HFP,
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.hbp = LCD_MIPI_HBP,
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.vsw = LCD_MIPI_VSW,
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.vfp = LCD_MIPI_VFP,
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.vbp = LCD_MIPI_VBP,
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.controlFlags = 0,
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.dsiLanes = DEMO_LCD_MIPI_LANE_NUM,
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};
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GPIO_PinInit(BOARD_MIPI_PANEL_POWER_GPIO, BOARD_MIPI_PANEL_POWER_PIN, &pinConfig);
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GPIO_PinInit(BOARD_MIPI_PANEL_BL_GPIO, BOARD_MIPI_PANEL_BL_PIN, &pinConfig);
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GPIO_PinInit(BOARD_MIPI_PANEL_RST_GPIO, BOARD_MIPI_PANEL_RST_PIN, &pinConfig);
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#if defined(DISPLAY_USING_RK055AHD091)
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status = RM68200_Init(&rm68200Handle, &displayConfig);
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#elif defined(DISPLAY_USING_RK055MHD091)
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status = HX8394_Init(&hx8394Handle, &displayConfig);
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#elif defined(DISPLAY_USING_RK055IQH091)
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status = RM68191_Init(&rm68191Handle, &displayConfig);
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#endif
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if (status == kStatus_Success)
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{
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GPIO_PinWrite(BOARD_MIPI_PANEL_BL_GPIO, BOARD_MIPI_PANEL_BL_PIN, 1);
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}
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return status;
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}
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static void BOARD_SetMipiDsiConfig(void)
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{
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dsi_config_t dsiConfig;
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dsi_dphy_config_t dphyConfig;
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const dsi_dpi_config_t dpiConfig = {.pixelPayloadSize = LCD_MIPI_WIDTH,
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.dpiColorCoding = kDSI_Dpi24Bit,
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.pixelPacket = kDSI_PixelPacket24Bit,
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.videoMode = kDSI_DpiBurst,
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.bllpMode = kDSI_DpiBllpLowPower,
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.polarityFlags = kDSI_DpiVsyncActiveLow | kDSI_DpiHsyncActiveLow,
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.hfp = LCD_MIPI_HFP,
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.hbp = LCD_MIPI_HBP,
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.hsw = LCD_MIPI_HSW,
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.vfp = LCD_MIPI_VFP,
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.vbp = LCD_MIPI_VBP,
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.panelHeight = LCD_MIPI_HEIGHT,
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.virtualChannel = 0};
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/*
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* dsiConfig.numLanes = 4;
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* dsiConfig.enableNonContinuousHsClk = false;
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* dsiConfig.autoInsertEoTp = true;
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* dsiConfig.numExtraEoTp = 0;
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* dsiConfig.htxTo_ByteClk = 0;
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* dsiConfig.lrxHostTo_ByteClk = 0;
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* dsiConfig.btaTo_ByteClk = 0;
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*/
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DSI_GetDefaultConfig(&dsiConfig);
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dsiConfig.numLanes = DEMO_LCD_MIPI_LANE_NUM;
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dsiConfig.autoInsertEoTp = true;
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/* Init the DSI module. */
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DSI_Init(DEMO_LCD_MIPI, &dsiConfig);
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/* Init DPHY.
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*
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* The DPHY bit clock must be fast enough to send out the pixels, it should be
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* larger than:
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*
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* (Pixel clock * bit per output pixel) / number of MIPI data lane
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*
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* Here the desired DPHY bit clock multiplied by ( 9 / 8 = 1.125) to ensure
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* it is fast enough.
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*
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* Note that the DSI output pixel is 24bit per pixel.
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*/
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mipiDsiDphyBitClkFreq_Hz = mipiDsiDpiClkFreq_Hz * (24 / DEMO_LCD_MIPI_LANE_NUM);
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mipiDsiDphyBitClkFreq_Hz = DEMO_MIPI_DPHY_BIT_CLK_ENLARGE(mipiDsiDphyBitClkFreq_Hz);
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DSI_GetDphyDefaultConfig(&dphyConfig, mipiDsiDphyBitClkFreq_Hz, mipiDsiTxEscClkFreq_Hz);
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mipiDsiDphyBitClkFreq_Hz = DSI_InitDphy(DEMO_LCD_MIPI, &dphyConfig, mipiDsiDphyRefClkFreq_Hz);
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/* Init DPI interface. */
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DSI_SetDpiConfig(DEMO_LCD_MIPI, &dpiConfig, DEMO_LCD_MIPI_LANE_NUM, mipiDsiDpiClkFreq_Hz, mipiDsiDphyBitClkFreq_Hz);
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}
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status_t BOARD_InitDisplayInterface(void)
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{
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CLOCK_EnableClock(kCLOCK_Video_Mux);
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#if defined(BSP_USING_LCDIFV2)
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/* LCDIF v2 output to MIPI DSI. */
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VIDEO_MUX->VID_MUX_CTRL.SET = VIDEO_MUX_VID_MUX_CTRL_MIPI_DSI_SEL_MASK;
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#elif defined(BSP_USING_ELCDIF)
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/* ELCDIF output to MIPI DSI. */
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VIDEO_MUX->VID_MUX_CTRL.CLR = VIDEO_MUX_VID_MUX_CTRL_MIPI_DSI_SEL_MASK;
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#endif
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/* 1. Power on and isolation off. */
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PGMC_BPC4->BPC_POWER_CTRL |= (PGMC_BPC_BPC_POWER_CTRL_PSW_ON_SOFT_MASK | PGMC_BPC_BPC_POWER_CTRL_ISO_OFF_SOFT_MASK);
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/* 2. Assert MIPI reset. */
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IOMUXC_GPR->GPR62 &=
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~(IOMUXC_GPR_GPR62_MIPI_DSI_PCLK_SOFT_RESET_N_MASK | IOMUXC_GPR_GPR62_MIPI_DSI_ESC_SOFT_RESET_N_MASK |
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IOMUXC_GPR_GPR62_MIPI_DSI_BYTE_SOFT_RESET_N_MASK | IOMUXC_GPR_GPR62_MIPI_DSI_DPI_SOFT_RESET_N_MASK);
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/* 3. Setup clock. */
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BOARD_InitMipiDsiClock();
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/* 4. Deassert PCLK and ESC reset. */
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IOMUXC_GPR->GPR62 |=
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(IOMUXC_GPR_GPR62_MIPI_DSI_PCLK_SOFT_RESET_N_MASK | IOMUXC_GPR_GPR62_MIPI_DSI_ESC_SOFT_RESET_N_MASK);
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/* 5. Configures peripheral. */
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BOARD_SetMipiDsiConfig();
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/* 6. Deassert BYTE and DBI reset. */
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IOMUXC_GPR->GPR62 |=
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(IOMUXC_GPR_GPR62_MIPI_DSI_BYTE_SOFT_RESET_N_MASK | IOMUXC_GPR_GPR62_MIPI_DSI_DPI_SOFT_RESET_N_MASK);
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/* 7. Configure the panel. */
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return BOARD_InitLcdPanel();
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}
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#if defined(BSP_USING_LCDIFV2)
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void LCDIFv2_IRQHandler(void)
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{
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DC_FB_LCDIFV2_IRQHandler(&g_dc);
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}
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#elif defined(BSP_USING_ELCDIF)
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void eLCDIF_IRQHandler(void)
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{
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DC_FB_ELCDIF_IRQHandler(&g_dc);
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}
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#endif
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status_t BOARD_VerifyDisplayClockSource(void)
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{
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status_t status;
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uint32_t srcClkFreq;
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/*
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* In this implementation, the SYSPLL2 (528M) clock is used as the source
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* of LCDIFV2 pixel clock and MIPI DSI ESC clock. The OSC24M clock is used
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* as the MIPI DSI DPHY PLL reference clock. This function checks the clock
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* source are valid. OSC24M is always valid, so only verify the SYSPLL2.
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*/
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srcClkFreq = CLOCK_GetPllFreq(kCLOCK_PllSys2);
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if (528 != (srcClkFreq / 1000000))
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{
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status = kStatus_Fail;
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}
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else
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{
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status = kStatus_Success;
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}
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return status;
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}
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status_t BOARD_PrepareDisplayController(void)
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{
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status_t status;
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status = BOARD_VerifyDisplayClockSource();
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if (status != kStatus_Success)
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{
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return status;
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}
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BOARD_InitLcdifClock();
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status = BOARD_InitDisplayInterface();
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if (kStatus_Success == status)
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{
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#if defined(BSP_USING_LCDIFV2)
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NVIC_ClearPendingIRQ(LCDIFv2_IRQn);
|
|
NVIC_SetPriority(LCDIFv2_IRQn, 3);
|
|
EnableIRQ(LCDIFv2_IRQn);
|
|
#elif defined(BSP_USING_ELCDIF)
|
|
NVIC_ClearPendingIRQ(eLCDIF_IRQn);
|
|
NVIC_SetPriority(eLCDIF_IRQn, 3);
|
|
EnableIRQ(eLCDIF_IRQn);
|
|
#endif
|
|
}
|
|
|
|
return kStatus_Success;
|
|
}
|