213 lines
6.6 KiB
C
213 lines
6.6 KiB
C
/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-19 wangyq the first version
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* 2019-11-01 wangyq update libraries
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#include <ald_cmu.h>
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#include <ald_timer.h>
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#include <ald_gpio.h>
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static void pwm_set_freq(timer_handle_t *timer_initstruct, uint32_t ns)
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{
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uint64_t _arr = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
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(timer_initstruct->init.prescaler + 1);
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WRITE_REG(timer_initstruct->perh->AR, (uint32_t)_arr);
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timer_initstruct->init.period = (uint32_t)_arr;
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}
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static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, uint32_t ns)
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{
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uint64_t tmp = (uint64_t)ald_cmu_get_pclk1_clock() * ns / 1000000000 /
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(timer_initstruct->init.prescaler + 1);
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if (ch == TIMER_CHANNEL_1)
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WRITE_REG(timer_initstruct->perh->CCVAL1, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_2)
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WRITE_REG(timer_initstruct->perh->CCVAL2, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_3)
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WRITE_REG(timer_initstruct->perh->CCVAL3, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_4)
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WRITE_REG(timer_initstruct->perh->CCVAL4, (uint32_t)tmp);
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}
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static rt_err_t es32f0_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
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{
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rt_err_t ret = RT_EOK;
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uint32_t _ccep;
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timer_channel_t pwm_channel;
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timer_oc_init_t tim_ocinit;
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timer_handle_t *timer_initstruct = (timer_handle_t *)device->parent.user_data;
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struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration *)arg;
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RT_ASSERT(timer_initstruct != RT_NULL);
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tim_ocinit.oc_mode = TIMER_OC_MODE_PWM1;
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tim_ocinit.oc_polarity = TIMER_OC_POLARITY_HIGH;
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tim_ocinit.oc_fast_en = DISABLE;
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tim_ocinit.ocn_polarity = TIMER_OCN_POLARITY_HIGH;
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tim_ocinit.ocn_idle = TIMER_OCN_IDLE_RESET;
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tim_ocinit.oc_idle = TIMER_OC_IDLE_RESET;
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/* select pwm output channel */
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if (1 == cfg->channel)
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{
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pwm_channel = TIMER_CHANNEL_1;
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}
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else if (2 == cfg->channel)
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{
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pwm_channel = TIMER_CHANNEL_2;
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}
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else if (3 == cfg->channel)
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{
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if (timer_initstruct->perh == GP16C2T0 || timer_initstruct->perh == GP16C2T1)
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return RT_EINVAL;
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pwm_channel = TIMER_CHANNEL_3;
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}
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else if (4 == cfg->channel)
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{
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if (timer_initstruct->perh == GP16C2T0 || timer_initstruct->perh == GP16C2T1 ||
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timer_initstruct->perh == GP16C4T0)
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return RT_EINVAL;
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pwm_channel = TIMER_CHANNEL_4;
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}
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else
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{
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return RT_EINVAL;
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}
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switch (cmd)
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{
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case PWM_CMD_ENABLE:
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ald_timer_pwm_start(timer_initstruct, pwm_channel);
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break;
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case PWM_CMD_DISABLE:
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ald_timer_pwm_stop(timer_initstruct, pwm_channel);
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break;
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case PWM_CMD_SET:
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_ccep = timer_initstruct->perh->CCEP;
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/* count registers max 0xFFFF, auto adjust prescaler */
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do
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{
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pwm_set_freq(timer_initstruct, cfg->period);
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timer_initstruct->init.prescaler ++;
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}
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while (timer_initstruct->init.period > 0xFFFF);
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/* update prescaler */
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WRITE_REG(timer_initstruct->perh->PRES, --timer_initstruct->init.prescaler);
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ald_timer_oc_config_channel(timer_initstruct, &tim_ocinit, pwm_channel);
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pwm_set_duty(timer_initstruct, pwm_channel, cfg->pulse);
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timer_initstruct->perh->CCEP = _ccep;
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break;
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case PWM_CMD_GET:
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cfg->pulse = ald_timer_read_capture_value(timer_initstruct, pwm_channel) * 100 /
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READ_REG(timer_initstruct->perh->AR);
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break;
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default:
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break;
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}
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return ret;
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}
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const static struct rt_pwm_ops es32f0_pwm_ops =
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{
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es32f0_pwm_control
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};
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int rt_hw_pwm_init(void)
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{
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rt_err_t ret = RT_EOK;
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gpio_init_t gpio_initstructure;
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gpio_initstructure.mode = GPIO_MODE_OUTPUT;
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gpio_initstructure.odos = GPIO_PUSH_PULL;
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gpio_initstructure.pupd = GPIO_PUSH_UP;
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gpio_initstructure.odrv = GPIO_OUT_DRIVE_NORMAL;
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gpio_initstructure.flt = GPIO_FILTER_DISABLE;
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gpio_initstructure.type = GPIO_TYPE_TTL;
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#ifdef BSP_USING_PWM0 /* 4 channels */
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static struct rt_device_pwm pwm_dev0;
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static timer_handle_t timer_initstruct0;
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timer_initstruct0.perh = GP16C4T0;
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ald_timer_pwm_init(&timer_initstruct0);
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/* gpio initialization */
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gpio_initstructure.func = GPIO_FUNC_2;
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ald_gpio_init(GPIOA, GPIO_PIN_8, &gpio_initstructure);
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ald_gpio_init(GPIOA, GPIO_PIN_9, &gpio_initstructure);
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ald_gpio_init(GPIOA, GPIO_PIN_10, &gpio_initstructure);
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ald_gpio_init(GPIOA, GPIO_PIN_11, &gpio_initstructure);
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ret = rt_device_pwm_register(&pwm_dev0, "pwm0", &es32f0_pwm_ops,
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&timer_initstruct0);
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#endif
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#ifdef BSP_USING_PWM1 /* 3 channels */
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static struct rt_device_pwm pwm_dev1;
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static timer_handle_t timer_initstruct1;
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timer_initstruct1.perh = GP16C4T1;
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ald_timer_pwm_init(&timer_initstruct1);
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/* gpio initialization */
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gpio_initstructure.func = GPIO_FUNC_2;
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ald_gpio_init(GPIOB, GPIO_PIN_6, &gpio_initstructure);
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ald_gpio_init(GPIOB, GPIO_PIN_7, &gpio_initstructure);
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ald_gpio_init(GPIOB, GPIO_PIN_8, &gpio_initstructure);
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ret = rt_device_pwm_register(&pwm_dev1, "pwm1", &es32f0_pwm_ops,
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&timer_initstruct1);
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#endif
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#ifdef BSP_USING_PWM2 /* 2 channels */
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static struct rt_device_pwm pwm_dev2;
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static timer_handle_t timer_initstruct2;
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timer_initstruct2.perh = GP16C2T0;
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ald_timer_pwm_init(&timer_initstruct2);
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/* gpio initialization */
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gpio_initstructure.func = GPIO_FUNC_2;
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ald_gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstructure);
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ald_gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstructure);
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ret = rt_device_pwm_register(&pwm_dev2, "pwm2", &es32f0_pwm_ops,
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&timer_initstruct2);
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#endif
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#ifdef BSP_USING_PWM3 /* 2 channels */
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static struct rt_device_pwm pwm_dev3;
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static timer_handle_t timer_initstruct3;
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timer_initstruct3.perh = GP16C2T1;
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ald_timer_pwm_init(&timer_initstruct3);
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/* gpio initialization */
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gpio_initstructure.func = GPIO_FUNC_3;
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ald_gpio_init(GPIOC, GPIO_PIN_6, &gpio_initstructure);
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ald_gpio_init(GPIOC, GPIO_PIN_7, &gpio_initstructure);
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ret = rt_device_pwm_register(&pwm_dev3, "pwm3", &es32f0_pwm_ops,
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&timer_initstruct3);
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#endif
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return ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_pwm_init);
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