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e244c196c4
This patch aims to unify the two currently separated RISC-V 64-bit architecture ports, 'virt64' and 'c906', into a single generic 'common64' port. The changes include renaming files and updating includes to use a unified 'interrupt.h' header, as well as making adjustments to IO and trap handling to be more consistent between the two architectures. Changes: - Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly. - Unified IO register access functions in 'riscv_io.h'. - Added 'opcode.h' for portable assembly support. - Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner. - Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'. Signed-off-by: Shell <smokewood@qq.com>
33 lines
1018 B
C
33 lines
1018 B
C
/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-01-30 lizhirui first version
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* 2024-08-28 RT-Thread Fit into rv64ilp32 ABI
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*/
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#ifndef __RISCV_H__
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#define __RISCV_H__
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#include <encoding.h>
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/* using unsigned long long for the case of rv64ilp32 */
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#define __SIZE(bit) (1ULL << (bit))
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#define __MASK(bit) (__SIZE(bit) - 1ULL)
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#define __UMASK(bit) (~(__MASK(bit)))
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#define __MASKVALUE(value,maskvalue) ((value) & (maskvalue))
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#define __UMASKVALUE(value,maskvalue) ((value) & (~(maskvalue)))
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#define __CHECKUPBOUND(value,bit_count) (!(((rt_ubase_t)value) & (~__MASK(bit_count))))
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#define __CHECKALIGN(value,start_bit) (!(((rt_ubase_t)value) & (__MASK(start_bit))))
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#define __PARTBIT(value,start_bit,length) (((value) >> (start_bit)) & __MASK(length))
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#define __ALIGNUP(value,bit) (((value) + __MASK(bit)) & __UMASK(bit))
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#define __ALIGNDOWN(value,bit) ((value) & __UMASK(bit))
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#endif
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