mirror of
https://github.com/RT-Thread/rt-thread.git
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2322f0154e
Confirmed with milkv, only the sd card version is sold by default for duo in the market. The spi pins are provided through stamp holes, so that users can solder the corresponding components on their baseboard during secondary development. In order to simplify maintenance work, the mainline will only support the sd-card version and no longer support spinor/spinand. Updated config files the same in this patch. Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
490 lines
12 KiB
C
490 lines
12 KiB
C
/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023/06/25 flyingcys first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_uart.h"
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#include "drv_pinmux.h"
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#include "drv_ioremap.h"
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#define DBG_TAG "DRV.UART"
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#define DBG_LVL DBG_WARNING
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#include <rtdbg.h>
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/*
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* Divide positive or negative dividend by positive divisor and round
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* to closest integer. Result is undefined for negative divisors and
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* for negative dividends if the divisor variable type is unsigned.
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*/
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#define DIV_ROUND_CLOSEST(x, divisor)( \
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{ \
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typeof(x) __x = x; \
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typeof(divisor) __d = divisor; \
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(((typeof(x))-1) > 0 || \
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((typeof(divisor))-1) > 0 || (__x) > 0) ? \
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(((__x) + ((__d) / 2)) / (__d)) : \
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(((__x) - ((__d) / 2)) / (__d)); \
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} \
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)
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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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struct hw_uart_device
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{
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rt_ubase_t hw_base;
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rt_uint32_t irqno;
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};
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#define BSP_DEFINE_UART_DEVICE(no) \
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static struct hw_uart_device _uart##no##_device = \
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{ \
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UART##no##_BASE, \
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UART##no##_IRQ \
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}; \
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static struct rt_serial_device _serial##no;
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#ifdef BSP_USING_UART0
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BSP_DEFINE_UART_DEVICE(0);
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#endif
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#ifdef BSP_USING_UART1
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BSP_DEFINE_UART_DEVICE(1);
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#endif
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#ifdef BSP_USING_UART2
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BSP_DEFINE_UART_DEVICE(2);
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#endif
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#ifdef BSP_USING_UART3
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BSP_DEFINE_UART_DEVICE(3);
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#endif
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rt_inline rt_uint32_t dw8250_read32(rt_ubase_t addr, rt_ubase_t offset)
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{
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return *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT)));
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}
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rt_inline void dw8250_write32(rt_ubase_t addr, rt_ubase_t offset, rt_uint32_t value)
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{
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*((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
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if (offset == UART_LCR)
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{
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int tries = 1000;
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/* Make sure LCR write wasn't ignored */
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while (tries--)
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{
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unsigned int lcr = dw8250_read32(addr, UART_LCR);
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if ((value & ~UART_LCR_STKP) == (lcr & ~UART_LCR_STKP))
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{
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return;
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}
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dw8250_write32(addr, UART_FCR, UART_FCR_DEFVAL);
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dw8250_read32(addr, UART_RX);
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*((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
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}
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}
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}
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static void dw8250_uart_setbrg(rt_ubase_t addr, int baud_divisor)
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{
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/* to keep serial format, read lcr before writing BKSE */
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int lcr_val = dw8250_read32(addr, UART_LCR) & ~UART_LCR_BKSE;
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dw8250_write32(addr, UART_LCR, UART_LCR_BKSE | lcr_val);
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dw8250_write32(addr, UART_DLL, baud_divisor & 0xff);
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dw8250_write32(addr, UART_DLM, (baud_divisor >> 8) & 0xff);
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dw8250_write32(addr, UART_LCR, lcr_val);
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}
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static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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rt_base_t base;
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struct hw_uart_device *uart;
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int clock_divisor;
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int last_ier_state;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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base = uart->hw_base;
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while (!(dw8250_read32(base, UART_LSR) & UART_LSR_TEMT));
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last_ier_state = dw8250_read32(base, UART_IER);
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dw8250_write32(base, UART_IER, 0);
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dw8250_write32(base, UART_MCR, UART_MCRVAL);
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dw8250_write32(base, UART_FCR, UART_FCR_DEFVAL);
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/* initialize serial config to 8N1 before writing baudrate */
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dw8250_write32(base, UART_LCR, UART_LCR_8N1);
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clock_divisor = DIV_ROUND_CLOSEST(UART_INPUT_CLK, 16 * serial->config.baud_rate);
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dw8250_uart_setbrg(base, clock_divisor);
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dw8250_write32(base, UART_IER, last_ier_state);
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return RT_EOK;
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}
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static rt_err_t dw8250_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* Disable rx irq */
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dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI);
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rt_hw_interrupt_mask(uart->irqno);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* Enable rx irq */
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dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI);
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rt_hw_interrupt_umask(uart->irqno);
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break;
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}
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return RT_EOK;
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}
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static int dw8250_uart_putc(struct rt_serial_device *serial, char c)
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{
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rt_base_t base;
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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base = uart->hw_base;
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while ((dw8250_read32(base, UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY);
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dw8250_write32(base, UART_TX, c);
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return 1;
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}
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static int dw8250_uart_getc(struct rt_serial_device *serial)
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{
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int ch = -1;
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rt_base_t base;
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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base = uart->hw_base;
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if (dw8250_read32(base, UART_LSR) & UART_LSR_DR)
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{
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ch = dw8250_read32(base, UART_RX) & 0xff;
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}
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return ch;
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}
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static const struct rt_uart_ops _uart_ops =
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{
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dw8250_uart_configure,
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dw8250_uart_control,
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dw8250_uart_putc,
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dw8250_uart_getc,
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};
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static void rt_hw_uart_isr(int irqno, void *param)
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{
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unsigned int iir, status;
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struct rt_serial_device *serial = (struct rt_serial_device *)param;
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struct hw_uart_device *uart = (struct hw_uart_device *)serial->parent.user_data;
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iir = dw8250_read32(uart->hw_base, UART_IIR);
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/* If don't do this in non-DMA mode then the "RX TIMEOUT" interrupt will fire forever. */
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if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)
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{
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status = dw8250_read32(uart->hw_base, UART_LSR);
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if (!(status & (UART_LSR_DR | UART_LSR_BI)))
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{
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dw8250_read32(uart->hw_base, UART_RX);
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}
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}
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if (!(iir & UART_IIR_NO_INT))
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY)
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{
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/* Clear the USR */
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dw8250_read32(uart->hw_base, UART_USR);
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return;
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}
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}
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#if defined(BOARD_TYPE_MILKV_DUO)
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#ifdef BSP_USING_UART0
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static const char *pinname_whitelist_uart0_rx[] = {
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"UART0_RX",
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NULL,
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};
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static const char *pinname_whitelist_uart0_tx[] = {
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"UART0_TX",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART1
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static const char *pinname_whitelist_uart1_rx[] = {
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"IIC0_SDA",
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"UART0_RX",
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NULL,
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};
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static const char *pinname_whitelist_uart1_tx[] = {
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"IIC0_SCL",
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"UART0_TX",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART2
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static const char *pinname_whitelist_uart2_rx[] = {
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"IIC0_SDA",
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"SD1_D1",
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NULL,
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};
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static const char *pinname_whitelist_uart2_tx[] = {
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"IIC0_SCL",
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"SD1_D2",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART3
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static const char *pinname_whitelist_uart3_rx[] = {
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"SD1_D1",
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NULL,
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};
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static const char *pinname_whitelist_uart3_tx[] = {
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"SD1_D2",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART4
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static const char *pinname_whitelist_uart4_rx[] = {
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"SD1_GPIO0",
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NULL,
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};
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static const char *pinname_whitelist_uart4_tx[] = {
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"SD1_GPIO1",
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NULL,
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};
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#endif
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#elif defined(BOARD_TYPE_MILKV_DUO256M)
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#ifdef BSP_USING_UART0
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static const char *pinname_whitelist_uart0_rx[] = {
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"UART0_RX",
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NULL,
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};
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static const char *pinname_whitelist_uart0_tx[] = {
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"UART0_TX",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART1
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static const char *pinname_whitelist_uart1_rx[] = {
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"IIC0_SDA",
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"JTAG_CPU_TCK",
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"UART0_RX",
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NULL,
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};
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static const char *pinname_whitelist_uart1_tx[] = {
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"IIC0_SCL",
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"JTAG_CPU_TMS",
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"UART0_TX",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART2
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static const char *pinname_whitelist_uart2_rx[] = {
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"IIC0_SDA",
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"SD1_D1",
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NULL,
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};
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static const char *pinname_whitelist_uart2_tx[] = {
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"IIC0_SCL",
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"SD1_D2",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART3
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static const char *pinname_whitelist_uart3_rx[] = {
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"SD1_D1",
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NULL,
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};
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static const char *pinname_whitelist_uart3_tx[] = {
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"SD1_D2",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART4
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static const char *pinname_whitelist_uart4_rx[] = {
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NULL,
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};
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static const char *pinname_whitelist_uart4_tx[] = {
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NULL,
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};
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#endif
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#elif defined(BOARD_TYPE_MILKV_DUOS)
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#ifdef BSP_USING_UART0
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static const char *pinname_whitelist_uart0_rx[] = {
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"UART0_RX",
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NULL,
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};
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static const char *pinname_whitelist_uart0_tx[] = {
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"UART0_TX",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART1
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static const char *pinname_whitelist_uart1_rx[] = {
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"JTAG_CPU_TCK",
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"UART0_RX",
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NULL,
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};
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static const char *pinname_whitelist_uart1_tx[] = {
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"JTAG_CPU_TMS",
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"UART0_TX",
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"IIC0_SCL",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART2
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static const char *pinname_whitelist_uart2_rx[] = {
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"VIVO_D9",
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"VIVO_D5",
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"VIVO_CLK",
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"PWR_GPIO1",
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NULL,
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};
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static const char *pinname_whitelist_uart2_tx[] = {
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"VIVO_D10",
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"VIVO_D6",
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"VIVO_D2",
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"IIC0_SCL",
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"PWR_GPIO0",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART3
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static const char *pinname_whitelist_uart3_rx[] = {
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"ADC2",
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NULL,
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};
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static const char *pinname_whitelist_uart3_tx[] = {
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"ADC3",
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NULL,
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};
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#endif
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#ifdef BSP_USING_UART4
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static const char *pinname_whitelist_uart4_rx[] = {
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NULL,
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};
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static const char *pinname_whitelist_uart4_tx[] = {
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NULL,
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};
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#endif
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#else
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#error "Unsupported board type!"
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#endif
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int rt_hw_uart_init(void)
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{
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struct hw_uart_device* uart;
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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config.baud_rate = 115200;
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#define BSP_INSTALL_UART_DEVICE(no) \
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uart = &_uart##no##_device; \
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_serial##no.ops = &_uart_ops; \
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_serial##no.config = config; \
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rt_hw_serial_register(&_serial##no, "uart" #no, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); \
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rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial##no, "uart" #no);
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#ifdef BSP_USING_UART0
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pinmux_config(BSP_UART0_RX_PINNAME, UART0_RX, pinname_whitelist_uart0_rx);
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pinmux_config(BSP_UART0_TX_PINNAME, UART0_TX, pinname_whitelist_uart0_tx);
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BSP_INSTALL_UART_DEVICE(0);
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uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
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#endif
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#ifdef BSP_USING_UART1
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pinmux_config(BSP_UART1_RX_PINNAME, UART1_RX, pinname_whitelist_uart1_rx);
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pinmux_config(BSP_UART1_TX_PINNAME, UART1_TX, pinname_whitelist_uart1_tx);
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BSP_INSTALL_UART_DEVICE(1);
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uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
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#endif
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#ifdef BSP_USING_UART2
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pinmux_config(BSP_UART2_RX_PINNAME, UART2_RX, pinname_whitelist_uart2_rx);
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pinmux_config(BSP_UART2_TX_PINNAME, UART2_TX, pinname_whitelist_uart2_tx);
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BSP_INSTALL_UART_DEVICE(2);
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uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
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#endif
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#ifdef BSP_USING_UART3
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pinmux_config(BSP_UART3_RX_PINNAME, UART3_RX, pinname_whitelist_uart3_rx);
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pinmux_config(BSP_UART3_TX_PINNAME, UART3_TX, pinname_whitelist_uart3_tx);
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BSP_INSTALL_UART_DEVICE(3);
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uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
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#endif
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#ifdef BSP_USING_UART4
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pinmux_config(BSP_UART4_RX_PINNAME, UART4_RX, pinname_whitelist_uart4_rx);
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pinmux_config(BSP_UART4_TX_PINNAME, UART4_TX, pinname_whitelist_uart4_tx);
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BSP_INSTALL_UART_DEVICE(4);
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uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000);
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#endif
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return 0;
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}
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