393 lines
9.5 KiB
C
393 lines
9.5 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-12-15 JasonHu first version
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include <rtdevice.h>
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#include "drv_spi.h"
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#define DBG_TAG "DRV.SPI"
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#define DBG_LVL DBG_LOG
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#include <rtdbg.h>
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#include <sunxi_hal_spi.h>
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#ifdef BSP_USING_SPI
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struct hw_spi_bus
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{
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struct rt_spi_bus parent;
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hal_spi_master_port_t port;
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};
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#define BSP_SPI_MAX_HZ SPI_MAX_FREQUENCY
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#if defined (BSP_USING_SPI0)
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#define SPI0_BUS_NAME "spi0"
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#define SPI0_BUS_DEVICE0_NAME "spi01"
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struct hw_spi_bus spi0_bus;
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#endif /* BSP_USING_SPI0 */
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#if defined (BSP_USING_SPI1)
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#define SPI1_BUS_NAME "spi1"
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#define SPI1_BUS_DEVICE0_NAME "spi11"
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struct hw_spi_bus spi1_bus;
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#endif /* BSP_USING_SPI1 */
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static rt_err_t hw_spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
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{
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RT_ASSERT(cfg != RT_NULL);
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RT_ASSERT(device != RT_NULL);
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struct hw_spi_bus *spi_dev = RT_NULL;
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hal_spi_master_config_t hal_cfg;
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LOG_D("configure mode:%x, clk:%d\n", cfg->mode, cfg->max_hz);
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/* trans cfg to hal cfg */
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spi_dev = (struct hw_spi_bus *)(device->parent.user_data);
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if (cfg->max_hz > BSP_SPI_MAX_HZ)
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cfg->max_hz = BSP_SPI_MAX_HZ;
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/* set default frequency */
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hal_cfg.clock_frequency = cfg->max_hz;
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hal_cfg.slave_port = HAL_SPI_MASTER_SLAVE_0; /* only support slave 0 */
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/* byte order */
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if (cfg->mode & RT_SPI_MSB)
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{
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hal_cfg.bit_order = HAL_SPI_MASTER_MSB_FIRST;
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}
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else
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{
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hal_cfg.bit_order = HAL_SPI_MASTER_LSB_FIRST;
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}
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if(cfg->mode & RT_SPI_CPOL)
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{
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hal_cfg.cpol = HAL_SPI_MASTER_CLOCK_POLARITY1;
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}
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else
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{
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hal_cfg.cpol = HAL_SPI_MASTER_CLOCK_POLARITY0;
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}
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if(cfg->mode & RT_SPI_CPHA)
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{
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hal_cfg.cpha = HAL_SPI_MASTER_CLOCK_PHASE1;
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}
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else
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{
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hal_cfg.cpha = HAL_SPI_MASTER_CLOCK_PHASE0;
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}
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if (cfg->mode & RT_SPI_NO_CS)
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{
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hal_cfg.csmode = HAL_SPI_MASTER_CS_AUTO;
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}
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else
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{
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hal_cfg.csmode = HAL_SPI_MASTER_CS_SOFT;
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}
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if (hal_spi_hw_config(spi_dev->port, &hal_cfg) != SPI_MASTER_OK)
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{
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return -RT_EIO;
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}
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return RT_EOK;
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}
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static rt_uint32_t hw_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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spi_master_status_t ret = SPI_MASTER_OK;
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hal_spi_master_transfer_t tr;
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struct hw_spi_bus *spi_dev = RT_NULL;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->parent.user_data != RT_NULL);
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spi_dev = (struct hw_spi_bus *)(device->parent.user_data);
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tr.rx_buf = message->recv_buf;
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tr.rx_len = message->recv_buf == RT_NULL ? 0 : message->length;
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tr.tx_buf = message->send_buf;
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tr.tx_len = message->send_buf == RT_NULL ? 0 : message->length;
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tr.dummy_byte = 0;
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tr.tx_single_len = message->send_buf == RT_NULL ? 0 : message->length;
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tr.rx_nbits = SPI_NBITS_SINGLE;
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tr.tx_nbits = SPI_NBITS_SINGLE;
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if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS))
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{
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if (device->config.mode & RT_SPI_CS_HIGH)
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{
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hal_spi_cs(spi_dev->port, 1);
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}
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else
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{
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hal_spi_cs(spi_dev->port, 0);
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}
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}
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if (message->length > 0)
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{
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ret = hal_spi_xfer(spi_dev->port, &tr);
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}
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// FIXME: GCC O3 maybe not execute.
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if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS))
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{
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if (device->config.mode & RT_SPI_CS_HIGH)
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{
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hal_spi_cs(spi_dev->port, 0);
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}
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else
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{
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hal_spi_cs(spi_dev->port, 1);
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}
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}
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if (ret != SPI_MASTER_OK)
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{
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LOG_E("xfer err ret:%ld", ret);
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return -RT_EIO;
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}
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return message->length;
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}
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/**
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* attach a spi device on bus
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*/
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name)
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{
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rt_err_t ret = RT_EOK;
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struct hw_spi_bus *hw_spi = RT_NULL;
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struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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#ifdef BSP_USING_SPI0
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if (!rt_strcmp(bus_name, SPI0_BUS_NAME))
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{
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hw_spi = &spi0_bus;
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}
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else
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#endif
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#ifdef BSP_USING_SPI1
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if (!rt_strcmp(bus_name, SPI0_BUS_NAME))
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{
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hw_spi = &spi1_bus;
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}
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else
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#endif
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{
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return -RT_EIO;
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}
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/* TODO: attach device */
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ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, hw_spi);
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return ret;
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}
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static struct rt_spi_ops hw_spi_ops =
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{
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.configure = hw_spi_configure,
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.xfer = hw_spi_xfer
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};
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#endif /* BSP_USING_SPI */
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/* used to init spi bus */
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static hal_spi_master_config_t default_hal_cfg = {
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.bit_order = HAL_SPI_MASTER_MSB_FIRST,
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.clock_frequency = 5000000,//SPI_MOD_CLK,
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.cpha = HAL_SPI_MASTER_CLOCK_PHASE0,
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.cpol = HAL_SPI_MASTER_CLOCK_POLARITY0,
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.slave_port = HAL_SPI_MASTER_SLAVE_0,
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.csmode = HAL_SPI_MASTER_CS_SOFT,
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};
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int rt_hw_spi_init(void)
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{
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#if defined (BSP_USING_SPI0)
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spi0_bus.port = HAL_SPI_MASTER_0;
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if (hal_spi_init(spi0_bus.port, &default_hal_cfg) != SPI_MASTER_OK)
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{
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LOG_E("hal init %s bus failed!", SPI0_BUS_NAME);
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return -1;
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}
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rt_spi_bus_register(&spi0_bus.parent, SPI0_BUS_NAME, &hw_spi_ops);
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rt_hw_spi_device_attach(SPI0_BUS_NAME, SPI0_BUS_DEVICE0_NAME);
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#endif /* BSP_USING_SPI0 */
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#if defined (BSP_USING_SPI1)
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spi1_bus.port = HAL_SPI_MASTER_1;
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if (hal_spi_init(spi1_bus.port, &default_hal_cfg) != SPI_MASTER_OK)
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{
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LOG_E("hal init %s bus failed!", SPI1_BUS_NAME);
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return -1;
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}
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rt_spi_bus_register(&spi1_bus.parent, SPI1_BUS_NAME, &hw_spi_ops);
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rt_hw_spi_device_attach(SPI1_BUS_NAME, SPI1_BUS_DEVICE0_NAME);
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#endif /* BSP_USING_SPI1 */
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return RT_EOK;
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}
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INIT_DEVICE_EXPORT(rt_hw_spi_init);
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#define CFG_GPIO_PORT(p) ((p) - 'A' + 1)
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int32_t hal_spi_gpio_cfg_count(const char *secname)
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{
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return 4;
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}
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static const user_gpio_set_t _spi_gpio_cfg[][4] = {
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{// spi0
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{
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.gpio_name = "spi0_sclk",
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.port = CFG_GPIO_PORT('C'),
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.port_num = 2, // PC02
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.mul_sel = 2,
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.pull = 0, // no pull
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.drv_level = 3,
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.data = 0,
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},
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{
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.gpio_name = "spi0_cs",
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.port = CFG_GPIO_PORT('C'),
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.port_num = 3, // PC03
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.mul_sel = 2,
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.pull = 1, // pull up
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.drv_level = 3,
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.data = 0,
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},
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{
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.gpio_name = "spi0_mosi",
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.port = CFG_GPIO_PORT('C'),
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.port_num = 4, // PC04
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.mul_sel = 2,
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.pull = 0, // no pull
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.drv_level = 3,
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.data = 0,
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},
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{
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.gpio_name = "spi0_miso",
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.port = CFG_GPIO_PORT('C'),
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.port_num = 5, // PC05
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.mul_sel = 2,
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.pull = 0, // no pull
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.drv_level = 3,
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.data = 0,
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}
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},
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};
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int hal_spi_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id)
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{
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int i;
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if (id > sizeof(_spi_gpio_cfg) / sizeof(_spi_gpio_cfg[0]))
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{
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rt_kprintf("spi id %d>%d\n", id, sizeof(_spi_gpio_cfg) / sizeof(_spi_gpio_cfg[0]));
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return -1;
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}
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/* twi0 */
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for (i = 0; i < GPIONum; i++)
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{
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memcpy(gpio_cfg, &_spi_gpio_cfg[id][i], sizeof(user_gpio_set_t));
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gpio_cfg++;
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}
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return 0;
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}
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/*
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* 程序清单：这是一个 SPI 设备使用例程
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* 例程导出了 spi_w25q_sample 命令到控制终端
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* 命令调用格式：spi_w25q_sample spi10
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* 命令解释：命令第二个参数是要使用的SPI设备名称，为空则使用默认的SPI设备
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* 程序功能：通过SPI设备读取 w25q 的 ID 数据
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#define SPI_DEVICE_NAME "spi01"
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static void spi_sample(int argc, char *argv[])
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{
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struct rt_spi_device *spi_dev;
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static char cmd[200];
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static char recv_data[200];
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rt_uint8_t id[5] = {0};
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int i;
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rt_err_t err;
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int type;
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type = atoi(argv[1]);
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for (i = 0; i < sizeof(cmd); i++)
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{
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cmd[i] = i + 1;
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}
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/* 查找 spi 设备获取设备句柄 */
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spi_dev = (struct rt_spi_device *)rt_device_find(SPI_DEVICE_NAME);
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if (!spi_dev)
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{
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rt_kprintf("spi sample run failed! can't find %s device!\n", SPI_DEVICE_NAME);
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}
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else
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{
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struct rt_spi_configuration spi_cfg;
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spi_cfg.max_hz = 5000000;
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spi_cfg.mode = RT_SPI_MODE_0 | RT_SPI_MSB;
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spi_cfg.data_width = 8;
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rt_spi_configure(spi_dev, &spi_cfg);
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if (type == 1)
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{
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err = rt_spi_transfer(spi_dev, cmd, recv_data, sizeof(recv_data));
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}
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else if (type == 2)
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{
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err = rt_spi_send_then_recv(spi_dev, cmd, sizeof(cmd), recv_data, sizeof(recv_data));
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}
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else if (type == 3)
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{
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err = rt_spi_send(spi_dev, cmd, sizeof(cmd));
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}
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else if (type == 4)
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{
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err = rt_spi_send_then_send(spi_dev, cmd, sizeof(cmd), cmd, sizeof(cmd));
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}
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else if (type == 5)
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{
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err = rt_spi_recv(spi_dev, recv_data, sizeof(recv_data));
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}
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// err = rt_spi_send(spi_dev, cmd, sizeof(cmd));
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if (err != sizeof(cmd))
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{
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rt_kprintf("spi send error:%d\n", err);
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}
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}
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}
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/* 导出到 msh 命令列表中 */
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MSH_CMD_EXPORT(spi_sample, spi w25q sample);
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