497 lines
14 KiB
C
497 lines
14 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-3-15 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_WDT)
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#include <rthw.h>
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#include <rtdevice.h>
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#include <rtdbg.h>
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#include "NuMicro.h"
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/*-------------------------------------------------------------------------------*/
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/* watchdog timer timeout look up table */
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/*-------------------------------------------------------------------------------*/
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/* clock = LIRC 32000Hz. */
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/* */
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/* working hz toutsel exp cycles timeout (s) */
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/* 32000 0 4 16 0.0005 */
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/* 1 6 64 0.0020 */
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/* 2 8 256 0.0080 */
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/* 3 10 1024 0.0320 */
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/* 4 12 4096 0.1280 */
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/* 5 14 16384 0.5120 */
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/* 6 16 65536 2.0480 */
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/* 7 18 262144 8.1920 */
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/* 8 20 1048576 32.7680 */
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/*-------------------------------------------------------------------------------*/
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/* clock = LXT 32768Hz. */
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/* */
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/* working hz toutsel exp cycles timeout (s) */
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/* 32768 0 4 16 0.0005 */
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/* 1 6 64 0.0020 */
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/* 2 8 256 0.0078 */
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/* 3 10 1024 0.0313 */
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/* 4 12 4096 0.1250 */
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/* 5 14 16384 0.5000 */
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/* 6 16 65536 2.0000 */
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/* 7 18 262144 8.0000 */
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/* 8 20 1048576 32.000 */
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/*-------------------------------------------------------------------------------*/
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/* clock = 96MHz HCLK divide 2048 = 93750 Hz. */
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/* */
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/* working hz toutsel exp cycles timeout (s) */
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/* 46875 0 4 16 0.00034 */
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/* 1 6 64 0.00137 */
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/* 2 8 256 0.00546 */
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/* 3 10 1024 0.02185 */
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/* 4 12 4096 0.08738 */
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/* 5 14 16384 0.34953 */
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/* 6 16 65536 1.39810 */
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/* 7 18 262144 5.59241 */
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/* 8 20 1048576 22.3696 */
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/*-------------------------------------------------------------------------------*/
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/* Private define ---------------------------------------------------------------*/
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/* Pick a suitable wdt timeout interval, it is a trade-off between the
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consideration of timeout accuracy and the system performance. The MIN_CYCLES
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parameter is a numerical value of the toutsel setting, and it must be set to
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a correct one which matches to the literal meaning of MIN_TOUTSEL. */
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#define MIN_TOUTSEL (WDT_TIMEOUT_2POW10)
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#define MIN_CYCLES (1024)
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/* Macros to convert the value between the timeout interval and the soft time iterations. */
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#define ROUND_TO_INTEGER(value) ((int)(((value) * 10 + 5) / 10))
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#define CONV_SEC_TO_IT(hz, secs) (ROUND_TO_INTEGER((float)((secs) * (hz)) / (float)(MIN_CYCLES)))
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#define CONV_IT_TO_SEC(hz, iterations) (ROUND_TO_INTEGER((float)((iterations) * (MIN_CYCLES)) / (float)(hz)))
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/* Private typedef --------------------------------------------------------------*/
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struct soft_time_handle
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{
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int clock_hz;
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int wanted_sec;
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int report_sec;
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int left_iterations;
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int full_iterations;
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rt_bool_t expired;
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rt_bool_t feed_dog;
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};
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typedef volatile struct soft_time_handle soft_time_handle_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t wdt_init(rt_watchdog_t *dev);
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static rt_err_t wdt_control(rt_watchdog_t *dev, int cmd, void *args);
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static uint32_t wdt_get_module_clock(void);
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static uint32_t wdt_get_working_hz(void);
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static void soft_time_init(soft_time_handle_t *const soft_time);
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static void soft_time_setup(uint32_t wanted_sec, uint32_t hz, soft_time_handle_t *const soft_time);
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static void soft_time_feed_dog(soft_time_handle_t *const soft_time);
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#if defined(RT_USING_PM)
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static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
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static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
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static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
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static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
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#endif
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/* Public functions -------------------------------------------------------------*/
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/* Private variables ------------------------------------------------------------*/
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static struct soft_time_handle soft_time;
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static struct rt_watchdog_device device_wdt;
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static struct rt_watchdog_ops ops_wdt =
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{
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.init = wdt_init,
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.control = wdt_control,
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};
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#if defined(RT_USING_PM)
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static struct rt_device_pm_ops device_pm_ops =
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{
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.suspend = wdt_pm_suspend,
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.resume = wdt_pm_resume,
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.frequency_change = wdt_pm_frequency_change
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};
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#endif
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#if defined(RT_USING_PM)
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/* device pm suspend() entry. */
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static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
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{
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switch (mode)
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{
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case PM_SLEEP_MODE_NONE:
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case PM_SLEEP_MODE_IDLE:
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case PM_SLEEP_MODE_STANDBY:
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case PM_SLEEP_MODE_SHUTDOWN:
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break;
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case PM_SLEEP_MODE_LIGHT:
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case PM_SLEEP_MODE_DEEP:
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{
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uint32_t u32RegLockBackup = SYS_IsRegLocked();
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SYS_UnlockReg();
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WDT->CTL &= ~WDT_CTL_WDTEN_Msk;
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if (u32RegLockBackup)
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SYS_LockReg();
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break;
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}
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default:
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break;
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}
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return (int)RT_EOK;
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}
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/* device pm resume() entry. */
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static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode)
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{
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switch (mode)
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{
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case PM_SLEEP_MODE_NONE:
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case PM_SLEEP_MODE_IDLE:
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case PM_SLEEP_MODE_STANDBY:
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case PM_SLEEP_MODE_SHUTDOWN:
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break;
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case PM_SLEEP_MODE_LIGHT:
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case PM_SLEEP_MODE_DEEP:
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{
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uint32_t u32RegLockBackup = SYS_IsRegLocked();
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SYS_UnlockReg();
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WDT->CTL |= WDT_CTL_WDTEN_Msk;
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if (u32RegLockBackup)
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SYS_LockReg();
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}
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break;
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default:
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break;
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}
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}
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/* device pm frequency_change() entry. */
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static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode)
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{
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uint32_t clk, new_hz;
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new_hz = wdt_get_working_hz();
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clk = wdt_get_module_clock();
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if (clk == CLK_CLKSEL1_WDTSEL_HCLK_DIV2048)
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{
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if (new_hz == soft_time.clock_hz)
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return (int)(RT_EOK);
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/* frequency change occurs in critical section */
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soft_time_freqeucy_change(new_hz, &soft_time);
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}
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return (int)(RT_EOK);
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}
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static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time)
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{
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rt_base_t level;
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soft_time_handle_t new_time;
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rt_bool_t corner_case = RT_FALSE;
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level = rt_hw_interrupt_disable();
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new_time.clock_hz = new_hz;
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new_time.feed_dog = soft_time->feed_dog;
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new_time.expired = soft_time->expired;
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new_time.wanted_sec = soft_time->wanted_sec;
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new_time.full_iterations = CONV_SEC_TO_IT(new_hz, soft_time->wanted_sec);
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new_time.report_sec = CONV_IT_TO_SEC(new_hz, new_time.full_iterations);
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new_time.left_iterations = ROUND_TO_INTEGER((float)soft_time->left_iterations *
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(float)new_hz / (float)soft_time->clock_hz);
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if ((new_time.left_iterations == 0) && (soft_time->left_iterations > 0))
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{
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new_time.left_iterations++;;
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corner_case = RT_TRUE;
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}
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*soft_time = new_time;
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rt_hw_interrupt_enable(level);
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if (corner_case)
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{
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LOG_W("pm frequency change cause wdt internal left iterations convert to 0.\n\r \
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wdt driver will add another 1 iteration for this corner case.");
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}
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}
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#endif
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static void hw_wdt_init(void)
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{
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uint32_t u32RegLockBackup = SYS_IsRegLocked();
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SYS_UnlockReg();
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if (WDT_GET_RESET_FLAG())
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{
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LOG_W("System re-boots from watchdog timer reset.\n");
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WDT_CLEAR_RESET_FLAG();
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}
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if (u32RegLockBackup)
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SYS_LockReg();
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NVIC_EnableIRQ(WDT_IRQn);
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}
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/* wdt device driver initialize. */
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int rt_hw_wdt_init(void)
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{
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rt_err_t ret;
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hw_wdt_init();
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device_wdt.ops = &ops_wdt;
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ret = rt_hw_watchdog_register(&device_wdt, "wdt", RT_DEVICE_FLAG_RDWR, RT_NULL);
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#if defined(RT_USING_PM)
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rt_pm_device_register((struct rt_device *)&device_wdt, &device_pm_ops);
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#endif
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return (int)ret;
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}
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INIT_BOARD_EXPORT(rt_hw_wdt_init);
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/* Register rt-thread device.init() entry. */
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static rt_err_t wdt_init(rt_watchdog_t *dev)
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{
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soft_time_init(&soft_time);
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hw_wdt_init();
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return RT_EOK;
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}
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static uint32_t wdt_get_module_clock(void)
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{
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return (CLK_GetModuleClockSource(WDT_MODULE) << CLK_CLKSEL1_WDTSEL_Pos);
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}
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static uint32_t wdt_get_working_hz(void)
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{
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uint32_t clk, hz = 0;
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clk = wdt_get_module_clock();
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switch (clk)
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{
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case CLK_CLKSEL1_WDTSEL_LIRC:
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hz = __LIRC;
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break;
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case CLK_CLKSEL1_WDTSEL_LXT:
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hz = __LXT;
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break;
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case CLK_CLKSEL1_WDTSEL_HCLK_DIV2048:
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hz = CLK_GetHCLKFreq() / 2048;
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break;
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default:
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break;
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}
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return hz;
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}
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static void soft_time_init(soft_time_handle_t *const soft_time)
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{
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rt_memset((void *)soft_time, 0, sizeof(struct soft_time_handle));
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}
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static void soft_time_setup(uint32_t wanted_sec, uint32_t hz, soft_time_handle_t *const soft_time)
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{
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rt_base_t level;
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level = rt_hw_interrupt_disable();
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soft_time->expired = RT_FALSE;
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soft_time->feed_dog = RT_FALSE;
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soft_time->wanted_sec = wanted_sec;
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soft_time->full_iterations = CONV_SEC_TO_IT(hz, wanted_sec);
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soft_time->left_iterations = soft_time->full_iterations;
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soft_time->report_sec = CONV_IT_TO_SEC(hz, soft_time->full_iterations);
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soft_time->clock_hz = hz;
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rt_hw_interrupt_enable(level);
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}
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static void soft_time_feed_dog(soft_time_handle_t *const soft_time)
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{
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soft_time->feed_dog = RT_TRUE;
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}
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/* Register rt-thread device.control() entry. */
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static rt_err_t wdt_control(rt_watchdog_t *dev, int cmd, void *args)
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{
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uint32_t wanted_sec, hz;
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uint32_t *buf;
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rt_err_t ret = RT_EOK;
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uint32_t u32RegLockBackup;
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if (dev == NULL)
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return -(RT_EINVAL);
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u32RegLockBackup = SYS_IsRegLocked();
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SYS_UnlockReg();
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hz = wdt_get_working_hz();
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switch (cmd)
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{
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case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
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if (args == RT_NULL)
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{
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ret = -RT_EINVAL;
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break;
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}
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buf = (uint32_t *)args;
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*buf = soft_time.report_sec;
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break;
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case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
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wanted_sec = *((uint32_t *)args);
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if (wanted_sec == 0)
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{
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ret = -RT_EINVAL;
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break;
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}
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soft_time_setup(wanted_sec, hz, &soft_time);
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break;
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case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
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if (args == RT_NULL)
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{
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ret = -RT_EINVAL;
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break;
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}
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buf = (uint32_t *)args;
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*buf = CONV_IT_TO_SEC(hz, soft_time.left_iterations);
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break;
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case RT_DEVICE_CTRL_WDT_KEEPALIVE:
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/* Make a mark that the application has fed the watchdog. */
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soft_time_feed_dog(&soft_time);
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break;
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case RT_DEVICE_CTRL_WDT_START:
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WDT_RESET_COUNTER();
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WDT_Open(MIN_TOUTSEL, WDT_RESET_DELAY_1026CLK, TRUE, TRUE);
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WDT_EnableInt();
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break;
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case RT_DEVICE_CTRL_WDT_STOP:
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WDT_Close();
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break;
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default:
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ret = -RT_ERROR;
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}
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if (u32RegLockBackup)
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SYS_LockReg();
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return -(ret);
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}
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/* wdt interrupt entry */
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void WDT_IRQHandler(void)
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{
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rt_interrupt_enter();
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/* Clear wdt interrupt flag */
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if (WDT_GET_TIMEOUT_INT_FLAG())
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{
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WDT_CLEAR_TIMEOUT_INT_FLAG();
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}
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/* Clear wdt wakeup flag */
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if (WDT_GET_TIMEOUT_WAKEUP_FLAG())
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{
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WDT_CLEAR_TIMEOUT_WAKEUP_FLAG();
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}
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/* The soft time has not reached the configured timeout yet. Clear the wdt counter
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any way to prevent the system from hardware wdt reset. */
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if (soft_time.left_iterations-- > 0)
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{
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WDT_RESET_COUNTER();
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}
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/* The soft time reaches the configured timeout boundary. Clear the wdt
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counter if he application has fed the dog at least once until now. */
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else
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{
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if ((soft_time.feed_dog) && (!soft_time.expired))
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{
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WDT_RESET_COUNTER();
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soft_time.feed_dog = RT_FALSE;
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soft_time.left_iterations = soft_time.full_iterations;
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}
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else
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{
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/* Application does not feed the dog in time. */
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soft_time.expired = RT_TRUE;
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}
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}
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_WDT */
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