163 lines
9.6 KiB
C
163 lines
9.6 KiB
C
/*!
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\file gd32e230_cmp.h
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\brief definitions for the CMP
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\version 2018-06-19, V1.0.0, firmware for GD32E230
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*/
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/*
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Copyright (c) 2018, GigaDevice Semiconductor Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32E230_CMP_H
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#define GD32E230_CMP_H
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#include "gd32e230.h"
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/* CMP definitions */
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#define CMP CMP_BASE /*!< CMP base address */
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/* registers definitions */
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#define CMP_CS REG32((CMP) + 0x00U) /*!< CMP control and status register */
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/* CMP_CS bits definitions */
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#define CMP_CS_CMPEN BIT(0) /*!< CMP enable */
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#define CMP_CS_CMPSW BIT(1) /*!< CMP switch */
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#define CMP_CS_CMPM BITS(2,3) /*!< CMP mode */
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#define CMP_CS_CMPMSEL BITS(4,6) /*!< COMP_M input selection */
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#define CMP_CS_CMPOSEL BITS(8,10) /*!< CMP output selection */
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#define CMP_CS_CMPPL BIT(11) /*!< polarity of CMP output */
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#define CMP_CS_CMPHST BITS(12,13) /*!< CMP hysteresis */
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#define CMP_CS_CMPO BIT(14) /*!< CMP output */
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#define CMP_CS_CMPLK BIT(15) /*!< CMP lock */
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/* consts definitions */
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/* operating mode */
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typedef enum{
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CMP_HIGHSPEED = 0, /*!< high speed mode */
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CMP_MIDDLESPEED, /*!< medium speed mode */
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CMP_LOWSPEED, /*!< low speed mode */
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CMP_VERYLOWSPEED /*!< very-low speed mode */
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}operating_mode_enum;
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/* inverting input */
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typedef enum{
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CMP_1_4VREFINT = 0, /*!< VREFINT /4 input */
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CMP_1_2VREFINT, /*!< VREFINT /2 input */
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CMP_3_4VREFINT, /*!< VREFINT *3/4 input */
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CMP_VREFINT, /*!< VREFINT input */
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CMP_PA4, /*!< PA4 input */
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CMP_PA5, /*!< PA5 input */
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CMP_PA0, /*!< PA0 input */
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CMP_PA2 /*!< PA2 input */
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}inverting_input_enum;
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/* hysteresis */
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typedef enum{
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CMP_HYSTERESIS_NO = 0, /*!< output no hysteresis */
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CMP_HYSTERESIS_LOW, /*!< output low hysteresis */
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CMP_HYSTERESIS_MIDDLE, /*!< output middle hysteresis */
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CMP_HYSTERESIS_HIGH /*!< output high hysteresis */
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}cmp_hysteresis_enum;
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/* output */
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typedef enum{
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CMP_OUTPUT_NONE = 0x0U, /*!< output no selection */
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CMP_OUTPUT_TIMER0BKIN = 0x1U, /*!< TIMER 0 break input */
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CMP_OUTPUT_TIMER0IC0 = 0x2U, /*!< TIMER 0 channel0 input capture */
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CMP_OUTPUT_TIMER0OCPRECLR = 0x3U, /*!< TIMER 0 OCPRE_CLR input */
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CMP_OUTPUT_TIMER2IC0 = 0x06U, /*!< TIMER 2 channel0 input capture */
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CMP_OUTPUT_TIMER2OCPRECLR = 0x7U /*!< TIMER 2 OCPRE_CLR input */
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}cmp_output_enum;
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/* CMP mode */
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#define CS_CMPM(regval) (BITS(2,3) & ((uint32_t)(regval) << 2))
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#define CS_CMPM_HIGHSPEED CS_CMPM(0) /*!< CMP mode high speed */
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#define CS_CMPM_MIDDLESPEED CS_CMPM(1) /*!< CMP mode middle speed */
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#define CS_CMPM_LOWSPEED CS_CMPM(2) /*!< CMP mode low speed */
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#define CS_CMPM_VERYLOWSPEED CS_CMPM(3) /*!< CMP mode very low speed */
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/* comparator inverting input */
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#define CS_CMPMSEL(regval) (BITS(4,6) & ((uint32_t)(regval) << 4))
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#define CS_CMPMSEL_1_4VREFINT CS_CMPMSEL(0) /*!< CMP inverting input 1/4 Vrefint */
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#define CS_CMPMSEL_1_2VREFINT CS_CMPMSEL(1) /*!< CMP inverting input 1/2 Vrefint */
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#define CS_CMPMSEL_3_4VREFINT CS_CMPMSEL(2) /*!< CMP inverting input 3/4 Vrefint */
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#define CS_CMPMSEL_VREFINT CS_CMPMSEL(3) /*!< CMP inverting input Vrefint */
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#define CS_CMPMSEL_PA4 CS_CMPMSEL(4) /*!< CMP inverting input PA4*/
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#define CS_CMPMSEL_PA5 CS_CMPMSEL(5) /*!< CMP inverting input PA5*/
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#define CS_CMPMSEL_PA0 CS_CMPMSEL(6) /*!< CMP inverting input PA0*/
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#define CS_CMPMSEL_PA2 CS_CMPMSEL(7) /*!< CMP inverting input PA2*/
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/* CMP output */
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#define CS_CMPOSEL(regval) (BITS(8,10) & ((uint32_t)(regval) << 8))
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#define CS_CMPOSEL_OUTPUT_NONE CS_CMPOSEL(0) /*!< CMP output none */
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#define CS_CMPOSEL_OUTPUT_TIMER0BKIN CS_CMPOSEL(1) /*!< CMP output TIMER 0 break input */
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#define CS_CMPOSEL_OUTPUT_TIMER0IC0 CS_CMPOSEL(2) /*!< CMP output TIMER 0 channel 0 input capture */
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#define CS_CMPOSEL_OUTPUT_TIMER0OCPRECLR CS_CMPOSEL(3) /*!< CMP output TIMER 0 ocpreclear input */
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#define CS_CMPOSEL_OUTPUT_TIMER2IC0 CS_CMPOSEL(6) /*!< CMP output TIMER 2 channle 0 input capture */
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#define CS_CMPOSEL_OUTPUT_TIMER2OCPRECLR CS_CMPOSEL(7) /*!< CMP output TIMER 2 ocpreclear input */
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/* CMP hysteresis */
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#define CS_CMPHST(regval) (BITS(12,13) & ((uint32_t)(regval) << 12))
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#define CS_CMPHST_HYSTERESIS_NO CS_CMPHST(0) /*!< CMP output no hysteresis */
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#define CS_CMPHST_HYSTERESIS_LOW CS_CMPHST(1) /*!< CMP output low hysteresis */
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#define CS_CMPHST_HYSTERESIS_MIDDLE CS_CMPHST(2) /*!< CMP output middle hysteresis */
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#define CS_CMPHST_HYSTERESIS_HIGH CS_CMPHST(3) /*!< CMP output high hysteresis */
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/* CMP output level */
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#define CMP_OUTPUTLEVEL_HIGH ((uint32_t)0x00000001) /*!< comparator output high */
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#define CMP_OUTPUTLEVEL_LOW ((uint32_t)0x00000000) /*!< comparator output low */
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/* output polarity of comparator */
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#define CMP_OUTPUT_POLARITY_INVERTED ((uint32_t)0x00000001) /*!< output is inverted */
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#define CMP_OUTPUT_POLARITY_NOINVERTED ((uint32_t)0x00000000) /*!< output is not inverted */
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/* function declarations */
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/* initialization functions */
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/* CMP deinit */
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void cmp_deinit(void);
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/* CMP mode init */
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void cmp_mode_init(operating_mode_enum operating_mode, inverting_input_enum inverting_input, cmp_hysteresis_enum output_hysteresis);
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/* CMP output init */
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void cmp_output_init(cmp_output_enum output_slection, uint32_t output_polarity);
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/* enable CMP */
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void cmp_enable(void);
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/* disable CMP */
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void cmp_disable(void);
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/* enable CMP switch */
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void cmp_switch_enable(void);
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/* disable CMP switch */
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void cmp_switch_disable(void);
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/* get output level */
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uint32_t cmp_output_level_get(void);
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/* lock the CMP */
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void cmp_lock_enable(void);
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#endif /* GD32E230_CMP_H */
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