275 lines
9.5 KiB
C
275 lines
9.5 KiB
C
/*
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* @brief EMC Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "emc_001.h"
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/*****************************************************************************
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* Private types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Public types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Private functions
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****************************************************************************/
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/* DIV function with result rounded up */
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#define EMC_DIV_ROUND_UP(x, y) ((x + y - 1) / y)
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#ifndef EMC_SUPPORT_ONLY_PL172
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/* Get ARM External Memory Controller Version */
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static uint32_t EMC_GetARMPeripheralID(IP_EMC_001_Type *pEMC)
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{
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uint32_t *RegAdd;
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RegAdd = (uint32_t *) ((uint32_t) pEMC + 0xFE0);
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return (RegAdd[0] & 0xFF) | ((RegAdd[1] & 0xFF) << 8) |
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((RegAdd[2] & 0xFF) << 16) | (RegAdd[3] << 24);
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}
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#endif
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/* Calculate Clock Count from Timing Unit(nanoseconds) */
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static uint32_t EMC_TimingParamConvert(uint32_t EMC_Clock, int32_t input_ns, uint32_t adjust)
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{
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uint32_t temp;
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if (input_ns < 0) {
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return (-input_ns) >> 8;
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}
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temp = EMC_Clock / 1000000; /* MHz calculation */
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temp = temp * input_ns / 1000;
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/* round up */
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temp += 0xFF;
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/* convert to simple integer number format */
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temp >>= 8;
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if (temp > adjust) {
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return temp - adjust;
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}
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return 0;
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}
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/* Get Dynamic Memory Device Colum len */
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static uint32_t EMC_GetColsLen(uint32_t DynConfig)
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{
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uint32_t DevBusWidth;
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DevBusWidth = (DynConfig >> EMC_DYN_CONFIG_DEV_BUS_BIT) & 0x03;
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if (DevBusWidth == 2) {
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return 8;
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}
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else if (DevBusWidth == 1) {
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return ((DynConfig >> (EMC_DYN_CONFIG_DEV_SIZE_BIT + 1)) & 0x03) + 8;
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}
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else if (DevBusWidth == 0) {
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return ((DynConfig >> (EMC_DYN_CONFIG_DEV_SIZE_BIT + 1)) & 0x03) + 9;
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}
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return 0;
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}
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/* Initializes the Dynamic Controller according to the specified parameters
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in the IP_EMC_DYN_CONFIG_Type */
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void IP_EMC_Dynamic_Init(IP_EMC_001_Type *pEMC, IP_EMC_DYN_CONFIG_Type *Dynamic_Config, uint32_t EMC_Clock)
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{
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uint32_t ChipSelect, tmpclk;
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int i;
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for (ChipSelect = 0; ChipSelect < 4; ChipSelect++) {
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IP_EMC_001_Type *EMC_Reg_add = (IP_EMC_001_Type *) ((uint32_t) pEMC + (ChipSelect << 5));
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EMC_Reg_add->DYNAMICRASCAS0 = Dynamic_Config->DevConfig[ChipSelect].RAS |
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((Dynamic_Config->DevConfig[ChipSelect].ModeRegister <<
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(8 - EMC_DYN_MODE_CAS_BIT)) & 0xF00);
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EMC_Reg_add->DYNAMICCONFIG0 = Dynamic_Config->DevConfig[ChipSelect].DynConfig;
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}
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pEMC->DYNAMICREADCONFIG = Dynamic_Config->ReadConfig; /* Read strategy */
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pEMC->DYNAMICRP = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tRP, 1);
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pEMC->DYNAMICRAS = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tRAS, 1);
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pEMC->DYNAMICSREX = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tSREX, 1);
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pEMC->DYNAMICAPR = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tAPR, 1);
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pEMC->DYNAMICDAL = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tDAL, 0);
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pEMC->DYNAMICWR = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tWR, 1);
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pEMC->DYNAMICRC = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tRC, 1);
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pEMC->DYNAMICRFC = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tRFC, 1);
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pEMC->DYNAMICXSR = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tXSR, 1);
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pEMC->DYNAMICRRD = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tRRD, 1);
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pEMC->DYNAMICMRD = EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->tMRD, 1);
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/* TIM_Waitus(100); */
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/*TODO: if Timer driver is ready, it should replace below "for" delay technic */
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for (i = 0; i < 1000; i++) { /* wait 100us */
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}
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pEMC->DYNAMICCONTROL = 0x00000183; /* Issue NOP command */
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/* TIM_Waitus(200); */ /* wait 200us */
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/*TODO: if Timer driver is ready, it should replace below "for" delay technic */
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for (i = 0; i < 1000; i++) {}
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pEMC->DYNAMICCONTROL = 0x00000103; /* Issue PALL command */
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pEMC->DYNAMICREFRESH = 2; /* ( 2 * 16 ) -> 32 clock cycles */
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/* TIM_Waitus(200); */ /* wait 200us */
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for (i = 0; i < 80; i++) {}
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tmpclk = EMC_DIV_ROUND_UP(EMC_TimingParamConvert(EMC_Clock, Dynamic_Config->RefreshPeriod, 0), 16);
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pEMC->DYNAMICREFRESH = tmpclk;
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pEMC->DYNAMICCONTROL = 0x00000083; /* Issue MODE command */
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for (ChipSelect = 0; ChipSelect < 4; ChipSelect++) {
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/*uint32_t burst_length;*/
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uint32_t DynAddr;
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uint8_t Col_len;
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Col_len = EMC_GetColsLen(Dynamic_Config->DevConfig[ChipSelect].DynConfig);
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/* get bus wide: if 32bit, len is 4 else if 16bit len is 2 */
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/* burst_length = 1 << ((((Dynamic_Config->DynConfig[ChipSelect] >> 14) & 1)^1) +1); */
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if (Dynamic_Config->DevConfig[ChipSelect].DynConfig & (1 << EMC_DYN_CONFIG_DATA_BUS_WIDTH_BIT)) {
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/*32bit bus */
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/*burst_length = 2;*/
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Col_len += 2;
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}
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else {
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/*burst_length = 4;*/
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Col_len += 1;
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}
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DynAddr = Dynamic_Config->DevConfig[ChipSelect].BaseAddr;
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if (DynAddr != 0) {
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uint32_t temp;
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uint32_t ModeRegister;
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ModeRegister = Dynamic_Config->DevConfig[ChipSelect].ModeRegister;
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temp = *((volatile uint32_t *) (DynAddr | (ModeRegister << Col_len)));
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temp = temp;
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}
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}
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pEMC->DYNAMICCONTROL = 0x00000000; /* Issue NORMAL command */
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/* enable buffers */
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pEMC->DYNAMICCONFIG0 |= 1 << 19;
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pEMC->DYNAMICCONFIG1 |= 1 << 19;
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pEMC->DYNAMICCONFIG2 |= 1 << 19;
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pEMC->DYNAMICCONFIG3 |= 1 << 19;
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}
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/* Set Deep Sleep Mode for Dynamic Memory Controller */
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void IP_EMC_Dynamic_DeepSleepMode(IP_EMC_001_Type *pEMC, uint32_t Enable)
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{
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if (Enable) {
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pEMC->DYNAMICCONTROL |= 1 << EMC_DYN_CONTROL_DEEPSLEEP_BIT;
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}
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else {
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pEMC->DYNAMICCONTROL &= ~(1 << EMC_DYN_CONTROL_DEEPSLEEP_BIT);
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}
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}
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/* Enable Dynamic Memory Controller */
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void IP_EMC_Dynamic_Enable(IP_EMC_001_Type *pEMC, uint8_t Enable)
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{
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if (Enable) {
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pEMC->DYNAMICCONTROL |= EMC_DYN_CONTROL_ENABLE;
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}
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else {
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pEMC->DYNAMICCONTROL &= ~EMC_DYN_CONTROL_ENABLE;
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}
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}
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/* Initializes the Static Controller according to the specified parameters
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* in the IP_EMC_STATIC_CONFIG_Type
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*/
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void IP_EMC_Static_Init(IP_EMC_001_Type *pEMC, IP_EMC_STATIC_CONFIG_Type *Static_Config, uint32_t EMC_Clock)
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{
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IP_EMC_001_Type *EMC_Reg_add = (IP_EMC_001_Type *) ((uint32_t) pEMC + ((Static_Config->ChipSelect) << 5));
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EMC_Reg_add->STATICCONFIG0 = Static_Config->Config;
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EMC_Reg_add->STATICWAITWEN0 = EMC_TimingParamConvert(EMC_Clock, Static_Config->WaitWen, 1);
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EMC_Reg_add->STATICWAITOEN0 = EMC_TimingParamConvert(EMC_Clock, Static_Config->WaitOen, 0);
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EMC_Reg_add->STATICWAITRD0 = EMC_TimingParamConvert(EMC_Clock, Static_Config->WaitRd, 1);
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EMC_Reg_add->STATICWAITPAG0 = EMC_TimingParamConvert(EMC_Clock, Static_Config->WaitPage, 1);
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EMC_Reg_add->STATICWAITWR0 = EMC_TimingParamConvert(EMC_Clock, Static_Config->WaitWr, 2);
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EMC_Reg_add->STATICWAITTURN0 = EMC_TimingParamConvert(EMC_Clock, Static_Config->WaitTurn, 1);
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}
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/* Mirror CS1 to CS0 and DYCS0 */
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void IP_EMC_Mirror(IP_EMC_001_Type *pEMC, uint32_t Enable)
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{
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if (Enable) {
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pEMC->CONTROL |= 1 << 1;
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}
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else {
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pEMC->CONTROL &= ~(1 << 1);
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}
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}
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/* Enable EMC */
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void IP_EMC_Enable(IP_EMC_001_Type *pEMC, uint32_t Enable)
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{
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if (Enable) {
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pEMC->CONTROL |= 1;
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}
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else {
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pEMC->CONTROL &= ~(1);
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}
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}
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/* Set EMC LowPower Mode */
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void IP_EMC_LowPowerMode(IP_EMC_001_Type *pEMC, uint32_t Enable)
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{
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if (Enable) {
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pEMC->CONTROL |= 1 << 2;
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}
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else {
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pEMC->CONTROL &= ~(1 << 2);
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}
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}
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/* Initialize EMC */
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void IP_EMC_Init(IP_EMC_001_Type *pEMC, uint32_t Enable, uint32_t ClockRatio, uint32_t EndianMode)
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{
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pEMC->CONFIG = (EndianMode ? 1 : 0) | ((ClockRatio ? 1 : 0) << 8);
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/* Enable EMC 001 Normal Memory Map, No low power mode */
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pEMC->CONTROL = (Enable ? 1 : 0);
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}
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/* Set Static Memory Extended Wait in Clock */
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void IP_EMC_SetStaticExtendedWait(IP_EMC_001_Type *pEMC, uint32_t Wait16Clks)
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{
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pEMC->STATICEXTENDEDWAIT = Wait16Clks;
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}
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