287 lines
7.3 KiB
C
287 lines
7.3 KiB
C
/**************************************************************************//**
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-12-12 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_ADC)
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#include <rtdevice.h>
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#include "NuMicro.h"
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#include <drv_sys.h>
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/* Private define ---------------------------------------------------------------*/
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/* Private Typedef --------------------------------------------------------------*/
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struct nu_adc
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{
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struct rt_adc_device dev;
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char *name;
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uint32_t OpFreqKHz;
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IRQn_Type irqn;
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E_SYS_IPRST rstidx;
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E_SYS_IPCLK clkidx;
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int chn_num;
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uint32_t chn_mask;
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rt_sem_t m_psSem;
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};
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typedef struct nu_adc *nu_adc_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled);
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static rt_err_t nu_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value);
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/* Public functions ------------------------------------------------------------*/
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int rt_hw_adc_init(void);
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/* Private variables ------------------------------------------------------------*/
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static struct nu_adc g_sNuADC =
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{
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.name = "adc",
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.OpFreqKHz = 4000, /* 1000 <= OpFreqKHz <= 4000 */
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.chn_num = 8,
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.irqn = IRQ_ADC,
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.rstidx = ADCRST,
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.clkidx = ADCCKEN,
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.chn_mask = 0
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};
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static void nu_adc_isr(int vector, void *param)
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{
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uint32_t isr, conf;
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nu_adc_t psNuAdc = (nu_adc_t)param;
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conf = inpw(REG_ADC_CONF);
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isr = inpw(REG_ADC_ISR);
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if ((isr & ADC_ISR_NACF) && (conf & ADC_CONF_NACEN))
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{
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outpw(REG_ADC_ISR, ADC_ISR_NACF);
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}
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if (isr & ADC_ISR_MF)
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{
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rt_err_t result;
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outpw(REG_ADC_ISR, ADC_ISR_MF);
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result = rt_sem_release(psNuAdc->m_psSem);
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RT_ASSERT(result == RT_EOK);
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}
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}
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static rt_err_t _nu_adc_init(rt_device_t dev)
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{
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uint32_t div;
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nu_adc_t psNuAdc = (nu_adc_t)dev;
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/* ADC Engine Clock is set to freq Khz */
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if (psNuAdc->OpFreqKHz > 4000) psNuAdc->OpFreqKHz = 4000;
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if (psNuAdc->OpFreqKHz < 1000) psNuAdc->OpFreqKHz = 1000;
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div = 12000 / psNuAdc->OpFreqKHz;
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outpw(REG_CLK_DIVCTL7, inpw(REG_CLK_DIVCTL7) & ~((0x3 << 19) | (0x7 << 16) | (0xFFul << 24)));
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outpw(REG_CLK_DIVCTL7, (0 << 19) | (0 << 16) | ((div - 1) << 24));
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/* Install interrupt service routine */
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rt_hw_interrupt_install(psNuAdc->irqn, nu_adc_isr, (void *)psNuAdc, psNuAdc->name);
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return RT_EOK;
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}
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static rt_err_t _nu_adc_control(rt_device_t dev, int cmd, void *args)
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{
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rt_err_t ret = RT_EINVAL ;
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nu_adc_t psNuAdc = (nu_adc_t)dev;
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switch (cmd)
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{
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case START_MST: /* Menu Start Conversion */
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{
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/* Enable interrupt */
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outpw(REG_ADC_IER, inpw(REG_ADC_IER) | ADC_IER_MIEN);
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/* Start conversion */
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outpw(REG_ADC_CTL, inpw(REG_ADC_CTL) | ADC_CTL_MST);
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/* Wait it done */
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ret = rt_sem_take(psNuAdc->m_psSem, RT_WAITING_FOREVER);
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RT_ASSERT(ret == RT_EOK);
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/* Get data: valid data is 12-bit */
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*((uint32_t *)args) = inpw(REG_ADC_DATA) & 0x00000FFF;
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}
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break;
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case VBPOWER_ON: /* Enable ADC Internal Bandgap Power */
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{
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outpw(REG_ADC_CTL, inpw(REG_ADC_CTL) | ADC_CTL_VBGEN);
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}
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break;
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case VBPOWER_OFF: /* Disable ADC Internal Bandgap Power */
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{
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outpw(REG_ADC_CTL, inpw(REG_ADC_CTL) & ~ADC_CTL_VBGEN);
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}
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break;
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case NAC_ON: /* Enable Normal AD Conversion */
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{
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outpw(REG_ADC_CONF, inpw(REG_ADC_CONF) | ADC_CONF_NACEN | ADC_CONF_REFSEL_AVDD33);
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}
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break;
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case NAC_OFF: /* Disable Normal AD Conversion */
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{
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outpw(REG_ADC_CONF, inpw(REG_ADC_CONF) & ~ADC_CONF_NACEN);
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}
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break;
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case SWITCH_CH:
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{
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int chn = (int)args;
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if (chn >= psNuAdc->chn_num)
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{
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return -ret;
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}
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outpw(REG_ADC_CONF, (inpw(REG_ADC_CONF) & ~ADC_CONF_CHSEL_Msk) | (chn << ADC_CONF_CHSEL_Pos));
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}
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break;
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default:
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return -(ret);
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}
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return RT_EOK;
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}
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static rt_err_t _nu_adc_open(rt_device_t dev, rt_uint16_t oflag)
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{
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nu_adc_t psNuAdc = (nu_adc_t)dev;
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/* Enable ADC engine clock */
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nu_sys_ipclk_enable(psNuAdc->clkidx);
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/* Reset the ADC IP */
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nu_sys_ip_reset(psNuAdc->rstidx);
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/* Enable ADC Power */
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outpw(REG_ADC_CTL, inpw(REG_ADC_CTL) | ADC_CTL_ADEN);
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/* Enable ADC to high speed mode */
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outpw(REG_ADC_CONF, inpw(REG_ADC_CONF) | ADC_CONF_HSPEED);
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/* Enable interrupt */
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rt_hw_interrupt_umask(psNuAdc->irqn);
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/* Enable Normal AD Conversion */
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_nu_adc_control(dev, NAC_ON, RT_NULL);
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return RT_EOK;
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}
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static rt_err_t _nu_adc_close(rt_device_t dev)
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{
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nu_adc_t psNuAdc = (nu_adc_t)dev;
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/* Disable Normal AD Conversion */
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_nu_adc_control(dev, NAC_OFF, RT_NULL);
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/* Disable interrupt */
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rt_hw_interrupt_mask(psNuAdc->irqn);
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/* Disable ADC Power */
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outpw(REG_ADC_CTL, inpw(REG_ADC_CTL) & ~ADC_CTL_ADEN);
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/* Disable ADC engine clock */
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nu_sys_ipclk_disable(psNuAdc->clkidx);
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return RT_EOK;
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}
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static const struct rt_adc_ops nu_adc_ops =
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{
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nu_adc_enabled,
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nu_adc_convert,
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};
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/* nu_adc_enabled - Enable ADC clock and wait for ready */
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static rt_err_t nu_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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nu_adc_t psNuADC = (nu_adc_t)device;
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RT_ASSERT(device != RT_NULL);
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if (channel >= psNuADC->chn_num)
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return -(RT_EINVAL);
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if (enabled)
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{
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psNuADC->chn_mask |= (1 << channel);
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}
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else
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{
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psNuADC->chn_mask &= ~(1 << channel);
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}
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if (psNuADC->chn_mask > 0 && ((rt_device_t)device)->ref_count == 0)
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{
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_nu_adc_open((rt_device_t)device, 0);
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((rt_device_t)device)->ref_count = 1;
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}
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else if ((psNuADC->chn_mask == 0) && ((rt_device_t)device)->ref_count == 1)
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{
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_nu_adc_close((rt_device_t)device);
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((rt_device_t)device)->ref_count = 0;
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}
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return RT_EOK;
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}
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static rt_err_t nu_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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rt_err_t ret = RT_EOK;
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nu_adc_t psNuAdc = (nu_adc_t)device;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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if (channel >= psNuAdc->chn_num)
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{
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ret = RT_EINVAL;
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goto exit_nu_adc_convert;
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}
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else if ((ret = _nu_adc_control((rt_device_t)device, SWITCH_CH, (void *)channel)) != RT_EOK)
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{
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goto exit_nu_adc_convert;
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}
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else if ((ret = _nu_adc_control((rt_device_t)device, START_MST, (void *)value)) != RT_EOK)
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{
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goto exit_nu_adc_convert;
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}
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exit_nu_adc_convert:
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return (-ret) ;
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}
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int rt_hw_adc_init(void)
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{
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rt_err_t result = RT_ERROR;
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rt_device_t psDev = &g_sNuADC.dev.parent;
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result = rt_hw_adc_register(&g_sNuADC.dev, g_sNuADC.name, &nu_adc_ops, &g_sNuADC);
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RT_ASSERT(result == RT_EOK);
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result = _nu_adc_init(psDev);
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RT_ASSERT(result == RT_EOK);
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g_sNuADC.m_psSem = rt_sem_create("adc_mst_sem", 0, RT_IPC_FLAG_FIFO);
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RT_ASSERT(g_sNuADC.m_psSem != RT_NULL);
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return (int)result;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif //#if defined(BSP_USING_EADC)
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