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zhouji 42ce237dc9 [update] 整理cortex-a aarch32启动代码
1. 去除start_gcc.s中set_secondary_cpu_boot_address代码,这部分提取到qemu-vexpress-a9 bsp中。
2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s,使用汇编实现,采用wake属性,方便bsp根据cpu特性获取CPU ID(多cpu集群中,不同厂家使用组合不一样).
3. 整理start_gcc.s 适应多核启动,原来的代码只考虑到双核的情况。
2021-05-14 15:30:31 +08:00

66 lines
1.3 KiB
C

/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-22 Jesven first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <stdint.h>
#include "board.h"
#include "gic.h"
#include "drv_timer.h"
#ifdef RT_USING_SMP
#include <interrupt.h>
static void rt_hw_timer2_isr(int vector, void *param)
{
rt_tick_increase();
/* clear interrupt */
timer_clear_pending(0);
}
void set_secondary_cpu_boot_address(void)
{
extern void secondary_cpu_start(void);
uint32_t *boot_address = (uint32_t *)0x10000030;
*(boot_address + 1) = ~0ul;
*boot_address = (uint32_t )&secondary_cpu_start;
}
void rt_hw_secondary_cpu_up(void)
{
set_secondary_cpu_boot_address();
__asm__ volatile ("dsb":::"memory");
rt_hw_ipi_send(0, 1 << 1);
}
void secondary_cpu_c_start(void)
{
rt_hw_vector_init();
rt_hw_spin_lock(&_cpus_lock);
arm_gic_cpu_init(0, REALVIEW_GIC_CPU_BASE);
arm_gic_set_cpu(0, IRQ_PBA8_TIMER0_1, 0x2);
timer_init(0, 10000);
rt_hw_interrupt_install(IRQ_PBA8_TIMER0_1, rt_hw_timer2_isr, RT_NULL, "tick");
rt_hw_interrupt_umask(IRQ_PBA8_TIMER0_1);
rt_system_scheduler_start();
}
void rt_hw_secondary_cpu_idle_exec(void)
{
asm volatile ("wfe":::"memory", "cc");
}
#endif