50 lines
1.9 KiB
C
50 lines
1.9 KiB
C
/*
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* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/******************************************************************************
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* @file dw_timer.h
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* @brief header file for timer driver
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* @version V1.0
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* @date 02. June 2017
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******************************************************************************/
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#ifndef __DW_TIMER_H
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#define __DW_TIMER_H
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#include <stdio.h>
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#include "soc.h"
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/*
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* define the bits for TxControl
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*/
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#define DW_TIMER_TXCONTROL_ENABLE (1UL << 0)
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#define DW_TIMER_TXCONTROL_MODE (1UL << 1)
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#define DW_TIMER_TXCONTROL_INTMASK (1UL << 2)
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#define DW_TIMER_INIT_DEFAULT_VALUE 0x7ffffff
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typedef struct {
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__IOM uint32_t TxLoadCount; /* Offset: 0x000 (R/W) Receive buffer register */
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__IM uint32_t TxCurrentValue; /* Offset: 0x004 (R) Transmission hold register */
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__IOM uint8_t TxControl: 4; /* Offset: 0x008 (R/W) Clock frequency division low section register */
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uint8_t RESERVED0[3];
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__IM uint8_t TxEOI: 1; /* Offset: 0x00c (R) Clock frequency division high section register */
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uint8_t RESERVED1[3];
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__IM uint8_t TxIntStatus: 1; /* Offset: 0x010 (R) Interrupt enable register */
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uint8_t RESERVED2[3];
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} dw_timer_reg_t;
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#endif /* __DW_TIMER_H */
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