316 lines
7.4 KiB
C
316 lines
7.4 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-05-12 hqfang first version
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*/
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#include "drv_hwtimer.h"
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#ifdef BSP_USING_HWTIMER
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#if !defined(BSP_USING_HWTIMER0) && !defined(BSP_USING_HWTIMER1) && !defined(BSP_USING_HWTIMER2) \
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&& !defined(BSP_USING_HWTIMER3) && !defined(BSP_USING_HWTIMER4)
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#error "Please define at least one BSP_USING_HWTIMERx"
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/* this driver can be disabled at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable HWTIMER */
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#endif
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static struct gd32_hwtimer_config hwtimer_config[] =
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{
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#ifdef BSP_USING_HWTIMER0
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{
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"timer0",
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TIMER0,
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TIMER0_UP_IRQn,
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},
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#endif
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#ifdef BSP_USING_HWTIMER1
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{
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"timer1",
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TIMER1,
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TIMER1_IRQn,
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},
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#endif
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#ifdef BSP_USING_HWTIMER2
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{
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"timer2",
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TIMER2,
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TIMER2_IRQn,
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},
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#endif
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#ifdef BSP_USING_HWTIMER3
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{
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"timer3",
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TIMER3,
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TIMER3_IRQn,
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},
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#endif
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#ifdef BSP_USING_HWTIMER4
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{
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"timer4",
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TIMER4,
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TIMER4_IRQn,
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},
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#endif
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#ifdef BSP_USING_HWTIMER5
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{
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"timer5",
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TIMER5,
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TIMER5_IRQn,
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},
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#endif
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#ifdef BSP_USING_HWTIMER6
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{
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"timer6",
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TIMER6,
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TIMER6_IRQn,
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},
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#endif
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};
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static struct gd32_hwtimer hwtimer_obj[sizeof(hwtimer_config) / sizeof(hwtimer_config[0])] = {0};
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static rt_err_t gd32_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
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{
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rt_err_t err = RT_EOK;
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struct gd32_hwtimer_config *config;
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RT_ASSERT(timer != RT_NULL);
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config = (struct gd32_hwtimer_config *)timer->parent.user_data;
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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uint32_t clk;
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uint8_t clkpre;
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uint32_t pre;
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if (config->timer_periph != TIMER0)
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{
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clk = rcu_clock_freq_get(CK_APB1);
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clkpre = GET_BITS(RCU_CFG0, 8, 10);
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}
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else
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{
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clk = rcu_clock_freq_get(CK_APB2);
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clkpre = GET_BITS(RCU_CFG0, 11, 13);
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}
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if (clkpre >= 4)
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{
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clk = clk * 2;
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}
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pre = (clk / * ((uint32_t *)args)) - 1;
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TIMER_PSC(config->timer_periph) = (uint32_t)pre;
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}
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break;
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case HWTIMER_CTRL_STOP:
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timer_disable(config->timer_periph);
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break;
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default:
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err = -RT_ENOSYS;
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break;
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}
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return err;
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}
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static rt_uint32_t gd32_hwtimer_count_get(rt_hwtimer_t *timer)
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{
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rt_uint32_t CurrentTimer_Count;
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struct gd32_hwtimer_config *config;
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RT_ASSERT(timer != RT_NULL);
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config = (struct gd32_hwtimer_config *)timer->parent.user_data;
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CurrentTimer_Count = timer_counter_read(config->timer_periph);
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return CurrentTimer_Count;
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}
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static void gd32_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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struct gd32_hwtimer_config *config;
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timer_parameter_struct initpara;
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RT_ASSERT(timer != RT_NULL);
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config = (struct gd32_hwtimer_config *)timer->parent.user_data;
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if (state == 1)
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{
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timer_deinit(config->timer_periph);
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timer_struct_para_init(&initpara);
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timer_init(config->timer_periph, &initpara);
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}
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else
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{
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timer_disable(config->timer_periph);
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timer_interrupt_enable(config->timer_periph, TIMER_INT_FLAG_UP);
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ECLIC_DisableIRQ(config->irqn);
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}
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}
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static rt_err_t gd32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
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{
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struct gd32_hwtimer_config *config;
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RT_ASSERT(timer != RT_NULL);
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config = (struct gd32_hwtimer_config *)timer->parent.user_data;
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if (mode == HWTIMER_MODE_ONESHOT)
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{
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timer_single_pulse_mode_config(config->timer_periph, TIMER_SP_MODE_SINGLE);
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}
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else
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{
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timer_single_pulse_mode_config(config->timer_periph, TIMER_SP_MODE_REPETITIVE);
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}
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timer_counter_value_config(config->timer_periph, 0);
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timer_autoreload_value_config(config->timer_periph, cnt);
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timer_interrupt_enable(config->timer_periph, TIMER_INT_FLAG_UP);
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timer_enable(config->timer_periph);
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ECLIC_EnableIRQ(config->irqn);
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return RT_EOK;
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}
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static void gd32_hwtimer_stop(rt_hwtimer_t *timer)
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{
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struct gd32_hwtimer_config *config;
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RT_ASSERT(timer != RT_NULL);
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config = (struct gd32_hwtimer_config *)timer->parent.user_data;
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timer_disable(config->timer_periph);
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ECLIC_DisableIRQ(config->irqn);
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}
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static const struct rt_hwtimer_ops gd32_hwtimer_ops =
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{
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.init = gd32_hwtimer_init,
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.start = gd32_hwtimer_start,
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.stop = gd32_hwtimer_stop,
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.count_get = gd32_hwtimer_count_get,
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.control = gd32_hwtimer_control,
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};
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static const struct rt_hwtimer_info gd32_hwtimer_info =
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{
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54000000, /* the maximum count frequency can be set */
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1000, /* the minimum count frequency can be set */
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0xFFFF,
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HWTIMER_CNTMODE_UP,
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};
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#ifdef BSP_USING_HWTIMER0
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void TIMER0_UP_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[0].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[0].time_device);
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}
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#endif
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#ifdef BSP_USING_HWTIMER1
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void TIMER1_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[1].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[1].time_device);
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}
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#endif
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#ifdef BSP_USING_HWTIMER2
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void TIMER2_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[2].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[2].time_device);
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}
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#endif
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#ifdef BSP_USING_HWTIMER3
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void TIMER3_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[3].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[3].time_device);
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}
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#endif
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#ifdef BSP_USING_HWTIMER4
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void TIMER4_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[4].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[4].time_device);
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}
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#endif
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#ifdef BSP_USING_HWTIMER5
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void TIMER5_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[5].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[5].time_device);
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}
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#endif
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#ifdef BSP_USING_HWTIMER6
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void TIMER6_IRQHandler(void)
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{
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timer_interrupt_flag_clear(hwtimer_obj[6].config->timer_periph, TIMER_INT_FLAG_UP);
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rt_device_hwtimer_isr(&hwtimer_obj[6].time_device);
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}
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#endif
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static int rt_hwtimer_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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#ifdef BSP_USING_HWTIMER0
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rcu_periph_clock_enable(RCU_TIMER0);
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#endif
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#ifdef BSP_USING_HWTIMER1
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rcu_periph_clock_enable(RCU_TIMER1);
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#endif
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#ifdef BSP_USING_HWTIMER2
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rcu_periph_clock_enable(RCU_TIMER2);
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#endif
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#ifdef BSP_USING_HWTIMER3
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rcu_periph_clock_enable(RCU_TIMER3);
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#endif
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#ifdef BSP_USING_HWTIMER4
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rcu_periph_clock_enable(RCU_TIMER4);
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#endif
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#ifdef BSP_USING_HWTIMER5
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rcu_periph_clock_enable(RCU_TIMER5);
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#endif
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#ifdef BSP_USING_HWTIMER6
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rcu_periph_clock_enable(RCU_TIMER6);
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#endif
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for (i = 0; i < sizeof(hwtimer_obj) / sizeof(hwtimer_obj[0]); i++)
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{
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hwtimer_obj[i].time_device.info = &gd32_hwtimer_info;
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hwtimer_obj[i].time_device.ops = &gd32_hwtimer_ops;
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hwtimer_obj[i].config = &hwtimer_config[i];
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rt_device_hwtimer_register(&hwtimer_obj[i].time_device, \
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hwtimer_obj[i].config->name, hwtimer_obj[i].config);
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}
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return result;
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}
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INIT_DEVICE_EXPORT(rt_hwtimer_init);
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#endif /* RT_USING_HWTIMER */
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