180 lines
3.5 KiB
C
180 lines
3.5 KiB
C
/*
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* Copyright (c) 2021-2022 HPMicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef DRV_ENET_H
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#define DRV_ENET_H
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#include <netif/ethernetif.h>
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#include "hpm_enet_drv.h"
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#include "board.h"
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typedef enum {
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ENET_MAC_ADDR_PARA_ERROR = -1,
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ENET_MAC_ADDR_FROM_OTP_MAC,
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ENET_MAC_ADDR_FROM_OTP_UUID,
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ENET_MAC_ADDR_FROM_MACRO
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} enet_mac_addr_t;
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typedef struct {
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uint8_t mac_addr0;
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uint8_t mac_addr1;
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uint8_t mac_addr2;
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uint8_t mac_addr3;
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uint8_t mac_addr4;
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uint8_t mac_addr5;
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} mac_init_t;
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typedef struct {
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ENET_Type * instance;
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enet_desc_t desc;
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enet_mac_config_t mac_config;
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uint8_t media_interface;
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uint32_t irq_number;
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bool int_refclk;
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uint8_t tx_delay;
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uint8_t rx_delay;
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enet_int_config_t int_config;
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#if __USE_ENET_PTP
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bool ptp_enable;
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uint32_t ptp_clk_src;
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enet_ptp_config_t ptp_config;
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enet_ptp_ts_update_t ptp_timestamp;
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#endif
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} enet_device;
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typedef struct _hpm_enet
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{
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const char *name;
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ENET_Type *base;
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clock_name_t clock_name;
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int32_t irq_num;
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uint8_t inf;
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struct eth_device *eth_dev;
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enet_device *enet_dev;
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enet_buff_config_t *rx_buff_cfg;
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enet_buff_config_t *tx_buff_cfg;
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volatile enet_rx_desc_t *dma_rx_desc_tab;
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volatile enet_tx_desc_t *dma_tx_desc_tab;
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uint8_t tx_delay;
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uint8_t rx_delay;
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bool int_refclk;
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#if __USE_ENET_PTP
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bool ptp_enable;
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uint32_t ptp_clk_src;
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enet_ptp_config_t *ptp_config;
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enet_ptp_ts_update_t *ptp_timestamp;
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#endif
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} hpm_enet_t;
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#define IS_UUID_INVALID(UUID) (UUID[0] == 0 && \
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UUID[1] == 0 && \
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UUID[2] == 0 && \
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UUID[3] == 0)
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#define IS_MAC_INVALID(MAC) (MAC[0] == 0 && \
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MAC[1] == 0 && \
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MAC[2] == 0 && \
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MAC[3] == 0 && \
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MAC[4] == 0 && \
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MAC[5] == 0)
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#if ENET_SOC_RGMII_EN
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#ifndef ENET0_TX_BUFF_COUNT
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#define ENET0_TX_BUFF_COUNT (50U)
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#endif
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#ifndef ENET0_RX_BUFF_COUNT
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#define ENET0_RX_BUFF_COUNT (60U)
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#endif
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#else
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#ifndef ENET0_TX_BUFF_COUNT
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#define ENET0_TX_BUFF_COUNT (10U)
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#endif
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#ifndef ENET0_RX_BUFF_COUNT
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#define ENET0_RX_BUFF_COUNT (20U)
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#endif
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#endif
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#ifndef ENET0_RX_BUFF_SIZE
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#define ENET0_RX_BUFF_SIZE ENET_MAX_FRAME_SIZE
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#endif
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#ifndef ENET0_TX_BUFF_SIZE
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#define ENET0_TX_BUFF_SIZE ENET_MAX_FRAME_SIZE
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#endif
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#ifndef ENET1_TX_BUFF_COUNT
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#define ENET1_TX_BUFF_COUNT (10U)
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#endif
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#ifndef ENET1_RX_BUFF_COUNT
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#define ENET1_RX_BUFF_COUNT (30U)
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#endif
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#ifndef ENET1_RX_BUFF_SIZE
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#define ENET1_RX_BUFF_SIZE ENET_MAX_FRAME_SIZE
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#endif
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#ifndef ENET1_TX_BUFF_SIZE
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#define ENET1_TX_BUFF_SIZE ENET_MAX_FRAME_SIZE
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#endif
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#ifndef MAC0_ADDR0
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#define MAC0_ADDR0 (0x98U)
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#endif
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#ifndef MAC0_ADDR1
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#define MAC0_ADDR1 (0x2CU)
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#endif
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#ifndef MAC0_ADDR2
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#define MAC0_ADDR2 (0xBCU)
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#endif
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#ifndef MAC0_ADDR3
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#define MAC0_ADDR3 (0xB1U)
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#endif
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#ifndef MAC0_ADDR4
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#define MAC0_ADDR4 (0x9FU)
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#endif
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#ifndef MAC0_ADDR5
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#define MAC0_ADDR5 (0x17U)
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#endif
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#ifndef MAC1_ADDR0
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#define MAC1_ADDR0 (0x98U)
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#endif
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#ifndef MAC1_ADDR1
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#define MAC1_ADDR1 (0x2CU)
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#endif
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#ifndef MAC1_ADDR2
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#define MAC1_ADDR2 (0xBCU)
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#endif
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#ifndef MAC1_ADDR3
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#define MAC1_ADDR3 (0xB1U)
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#endif
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#ifndef MAC1_ADDR4
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#define MAC1_ADDR4 (0x9FU)
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#endif
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#ifndef MAC1_ADDR5
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#define MAC1_ADDR5 (0x27U)
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#endif
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int rt_hw_eth_init(void);
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#endif /* DRV_ENET_H */
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/* DRV_GPIO_H */
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