135 lines
4.7 KiB
C
135 lines
4.7 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-07-31 shelton first version
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*/
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#ifndef __I2C_CONFIG_H__
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#define __I2C_CONFIG_H__
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#include <rtthread.h>
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#include "dma_config.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define HWI2C_OWN_ADDRESS 0x0
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#define I2C1_EVT_IRQHandler I2C1_EVT_IRQHandler
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#define I2C1_ERR_IRQHandler I2C1_ERR_IRQHandler
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#define I2C2_EVT_IRQHandler I2C2_EVT_IRQHandler
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#define I2C2_ERR_IRQHandler I2C2_ERR_IRQHandler
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#define I2C3_EVT_IRQHandler I2C3_EVT_IRQHandler
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#define I2C3_ERR_IRQHandler I2C3_ERR_IRQHandler
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#ifdef BSP_USING_HARD_I2C1
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#define I2C1_CONFIG \
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{ \
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.i2c_x = I2C1, \
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.i2c_name = "hwi2c1", \
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.timing = 0x60E02E2E, \
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.ev_irqn = I2C1_EVT_IRQn, \
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.er_irqn = I2C1_ERR_IRQn, \
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}
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#endif /* BSP_USING_HARD_I2C1 */
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#ifdef BSP_I2C1_RX_USING_DMA
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#define I2C1_RX_DMA_CONFIG \
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{ \
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.dma_channel = I2C1_RX_DMA_CHANNEL, \
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.dma_clock = I2C1_RX_DMA_CLOCK, \
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.dma_irqn = I2C1_RX_DMA_IRQ, \
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.dmamux_channel = I2C1_RX_DMA_MUX_CHANNEL, \
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.request_id = I2C1_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_I2C1_RX_USING_DMA */
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#ifdef BSP_I2C1_TX_USING_DMA
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#define I2C1_TX_DMA_CONFIG \
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{ \
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.dma_channel = I2C1_TX_DMA_CHANNEL, \
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.dma_clock = I2C1_TX_DMA_CLOCK, \
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.dma_irqn = I2C1_TX_DMA_IRQ, \
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.dmamux_channel = I2C1_TX_DMA_MUX_CHANNEL, \
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.request_id = I2C1_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_I2C1_TX_USING_DMA */
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#ifdef BSP_USING_HARD_I2C2
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#define I2C2_CONFIG \
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{ \
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.i2c_x = I2C2, \
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.i2c_name = "hwi2c2", \
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.timing = 0x60E02E2E, \
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.ev_irqn = I2C2_EVT_IRQn, \
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.er_irqn = I2C2_ERR_IRQn, \
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}
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#endif /* BSP_USING_HARD_I2C2 */
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#ifdef BSP_I2C2_RX_USING_DMA
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#define I2C2_RX_DMA_CONFIG \
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{ \
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.dma_channel = I2C2_RX_DMA_CHANNEL, \
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.dma_clock = I2C2_RX_DMA_CLOCK, \
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.dma_irqn = I2C2_RX_DMA_IRQ, \
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.dmamux_channel = I2C2_RX_DMA_MUX_CHANNEL, \
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.request_id = I2C2_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_I2C2_RX_USING_DMA */
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#ifdef BSP_I2C2_TX_USING_DMA
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#define I2C2_TX_DMA_CONFIG \
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{ \
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.dma_channel = I2C2_TX_DMA_CHANNEL, \
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.dma_clock = I2C2_TX_DMA_CLOCK, \
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.dma_irqn = I2C2_TX_DMA_IRQ, \
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.dmamux_channel = I2C2_TX_DMA_MUX_CHANNEL, \
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.request_id = I2C2_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_I2C2_TX_USING_DMA */
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#ifdef BSP_USING_HARD_I2C3
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#define I2C3_CONFIG \
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{ \
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.i2c_x = I2C3, \
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.i2c_name = "hwi2c3", \
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.timing = 0x60E02E2E, \
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.ev_irqn = I2C3_EVT_IRQn, \
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.er_irqn = I2C3_ERR_IRQn, \
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}
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#endif /* BSP_USING_HARD_I2C3 */
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#ifdef BSP_I2C3_RX_USING_DMA
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#define I2C3_RX_DMA_CONFIG \
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{ \
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.dma_channel = I2C3_RX_DMA_CHANNEL, \
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.dma_clock = I2C3_RX_DMA_CLOCK, \
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.dma_irqn = I2C3_RX_DMA_IRQ, \
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.dmamux_channel = I2C3_RX_DMA_MUX_CHANNEL, \
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.request_id = I2C3_RX_DMA_REQ_ID, \
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}
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#endif /* BSP_I2C3_RX_USING_DMA */
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#ifdef BSP_I2C3_TX_USING_DMA
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#define I2C3_TX_DMA_CONFIG \
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{ \
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.dma_channel = I2C3_TX_DMA_CHANNEL, \
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.dma_clock = I2C3_TX_DMA_CLOCK, \
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.dma_irqn = I2C3_TX_DMA_IRQ, \
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.dmamux_channel = I2C3_TX_DMA_MUX_CHANNEL, \
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.request_id = I2C3_TX_DMA_REQ_ID, \
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}
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#endif /* BSP_I2C3_TX_USING_DMA */
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#ifdef __cplusplus
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}
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#endif
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#endif /*__I2C_CONFIG_H__ */
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