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rt-thread-official/bsp/cvitek/c906_little
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Chen Wang 51825a5b5c bsp:cvitek: add pinmux for pwm 
Board level pin available info is summarized and list here for memo:

Duo:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP2     PWM10       PWR_GPIO[26]    SD1_GPIO1__PWM_10
GP3     PWM11       PWR_GPIO[25]    SD1_GPIO0__PWM_11

Duo256:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP3     PWM6        XGPIOA[18]      JTAG_CPU_TCK__PWM_6
GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP2     PWM7        XGPIOA[19]      JTAG_CPU_TMS__PWM_7
GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP10    PWM10       XGPIOC[14]      PAD_MIPI_TXM1__PWM_10
GP11    PWM11       XGPIOC[15]      PAD_MIPI_TXP1__PWM_11

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 		2024-07-16 18:29:17 +08:00
..
applications add cvitek/c906_little (#8514) 2024-01-29 09:13:21 +08:00
board bsp:cvitek: add pinmux for pwm 2024-07-16 18:29:17 +08:00
.config bsp:cvitek: add pinmux for uart 2024-07-16 18:29:17 +08:00
Kconfig bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句 2024-06-20 14:40:42 +08:00
README.md support cvitek bsp spinor flash 2024-04-09 18:09:54 -04:00
README_en.md support cvitek bsp spinor flash 2024-04-09 18:09:54 -04:00
SConscript add cvitek/c906_little (#8514) 2024-01-29 09:13:21 +08:00
SConstruct support cv181x c906_little (#8680) 2024-03-28 23:35:54 +08:00
rtconfig.h bsp:cvitek: add pinmux for uart 2024-07-16 18:29:17 +08:00
rtconfig.py support cv181x c906_little (#8680) 2024-03-28 23:35:54 +08:00

README_en.md

c906_little bsp

This BSP is a coprocessor in the cv18xx series processor, using RISCV C906 @ 700Mhz. Features:

  • No MMU
  • Integrated Floating-point Unit (FPU)

Toolchain Download

Download the toolchain for riscv64-unknown-elf-gcc: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395512373/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1-20240115.tar.gz

Note: Current BSP only supports Linux compilation.

After correct decompression, add the local path of the riscv64-unknown-elf-gcc toolchain to EXEC_PATH in rtconfig.py, or specify the path through the RTT_EXEC_PATH environment variable.

$ export RTT_EXEC_PATH=/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1/bin

Compilation

  1. Dependency Installation
$ sudo apt install -y scons libncurses5-dev wget flex bison
  1. On Linux platform, execute:
$ scons --menuconfig

Choose the target development board type that needs to be compiled:

Board Type (milkv-duo)  --->
    ( ) milkv-duo
    ( ) milkv-duo-spinor
    (X) milkv-duo256m
    ( ) milkv-duo256m-spinor

It will automatically download env related scripts to the ~/.env directory, then execute

$ source ~/.env/env.sh
$ pkgs --update

After updating the software packages, execute scons -j10 or scons -j10 --verbose to compile this BSP. Or use the scons --exec-path="GCC toolchain path" command to compile directly while specifying the toolchain location. If the compilation is correct, the rtthread.elf file will be generated.

After the compilation is completed, the script automatically calls the combine-fip.sh script for packaging, and generates fip.sd, which is the c906_little file for SD card startup.

The first time the combine-fip.sh script is called, it will automatically download the required opsbsbi, fsbl, uboot, and other related files to the bsp/cvitek/cvitek_bootloader directory, please be patient.

After downloading, it will automatically decompress and compile. Subsequently, when compiling the same type of development board again, only the relevant files will be called to package and synthesize fip.bin. If you need to manually compile the related cvitek_bootloader files, you can execute bash build.sh lunch in the bsp/cvitek/cvitek_bootloader directory to choose the corresponding development board for compilation.

Running

  1. Divide the SD card into 2 partitions, the 1st partition is used to store bin files, and the 2nd partition is used as a data storage partition, with the partition format being FAT32.
  2. Copy the fip.bin and boot.sd from the root directory into the 1st partition of the SD card. Subsequent firmware updates only require copying the fip.sd file. Where:
  • fip.bin: fsbl, opensbi, uboot, c906_little packaged bin file
  • boot.sd: bin file packaged by the main kernel

After updating fip.sd, restarting will show the output information on the serial port:

HW_HEAP_BEGIN:83f74dc0 RT_HW_HEAP_END:84000000 size: 569920

 \ | /
- RT -     Thread Operating System
 / | \     5.1.0 build Jan 27 2024 22:45:49
 2006 - 2022 Copyright by RT-Thread team
Hello, RISC-V!
msh />

Note: The default log serial port for the c906 little core is uart1