431 lines
12 KiB
C
431 lines
12 KiB
C
//*****************************************************************************
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//
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// am_hal_itm.c
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//! @file
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//!
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//! @brief Functions for operating the instrumentation trace macrocell
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//!
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//! @addtogroup itm2 Instrumentation Trace Macrocell (ITM)
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//! @ingroup apollo2hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2017, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.2.11 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#include <stdint.h>
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#include <stdbool.h>
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#include "am_mcu_apollo.h"
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//*****************************************************************************
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//
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// Global Variables
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! @brief Enables the ITM
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//!
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//! This function enables the ARM ITM by setting the TRCENA bit in the DEMCR
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//! register.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_enable(void)
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{
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if (g_ui32HALflags & AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_M)
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{
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return;
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}
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//
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// To be able to access ITM registers, set the Trace Enable bit
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// in the Debug Exception and Monitor Control Register (DEMCR).
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//
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AM_REG(SYSCTRL, DEMCR) |= AM_REG_SYSCTRL_DEMCR_TRCENA(1);
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while ( !(AM_REG(SYSCTRL, DEMCR) & AM_REG_SYSCTRL_DEMCR_TRCENA(1)) );
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//
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// Write the key to the ITM Lock Access register to unlock the ITM_TCR.
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//
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AM_REGVAL(AM_REG_ITM_LOCKAREG_O) = AM_REG_ITM_LOCKAREG_KEYVAL;
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//
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// Set the enable bits in the ITM trace enable register, and the ITM
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// control registers to enable trace data output.
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//
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AM_REGVAL(AM_REG_ITM_TPR_O) = 0x0000000f;
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AM_REGVAL(AM_REG_ITM_TER_O) = 0xffffffff;
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//
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// Write to the ITM control and status register.
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//
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AM_REGVAL(AM_REG_ITM_TCR_O) =
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AM_WRITE_SM(AM_REG_ITM_TCR_ATB_ID, 0x15) |
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AM_WRITE_SM(AM_REG_ITM_TCR_TS_FREQ, 1) |
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AM_WRITE_SM(AM_REG_ITM_TCR_TS_PRESCALE, 1) |
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AM_WRITE_SM(AM_REG_ITM_TCR_SWV_ENABLE, 1) |
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AM_WRITE_SM(AM_REG_ITM_TCR_DWT_ENABLE, 0) |
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AM_WRITE_SM(AM_REG_ITM_TCR_SYNC_ENABLE, 0) |
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AM_WRITE_SM(AM_REG_ITM_TCR_TS_ENABLE, 0) |
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AM_WRITE_SM(AM_REG_ITM_TCR_ITM_ENABLE, 1);
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}
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//*****************************************************************************
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//
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//! @brief Disables the ITM
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//!
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//! This function completely disables the ARM ITM by resetting the TRCENA bit
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//! in the DEMCR register.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_disable(void)
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{
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if (g_ui32HALflags & AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_M)
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{
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return;
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}
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//
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// Make sure the ITM_TCR is unlocked.
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//
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AM_REGVAL(AM_REG_ITM_LOCKAREG_O) = AM_REG_ITM_LOCKAREG_KEYVAL;
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//
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// Make sure the ITM/TPIU is not busy.
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//
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while ( AM_REG(ITM, TCR) & AM_REG_ITM_TCR_BUSY(1) );
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//
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// Disable the ITM.
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//
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for (int ix = 0; ix < 100; ix++)
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{
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AM_REG(ITM, TCR) &= ~AM_REG_ITM_TCR_ITM_ENABLE(1);
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while ( AM_REG(ITM, TCR) & (AM_REG_ITM_TCR_ITM_ENABLE(1) | AM_REG_ITM_TCR_BUSY(1)) );
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}
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//
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// Reset the TRCENA bit in the DEMCR register, which should disable the ITM
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// for operation.
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//
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AM_REG(SYSCTRL, DEMCR) &= ~AM_REG_SYSCTRL_DEMCR_TRCENA(1);
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//
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// Disable the TPIU clock source in MCU control.
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//
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AM_REG(MCUCTRL, TPIUCTRL) = AM_REG_MCUCTRL_TPIUCTRL_CLKSEL_0MHz |
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AM_REG_MCUCTRL_TPIUCTRL_ENABLE_DIS;
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}
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//*****************************************************************************
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//
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//! @brief Checks if itm is busy and provides a delay to flush the fifo
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//!
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//! This function disables the ARM ITM by resetting the TRCENA bit in the DEMCR
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//! register.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_not_busy(void)
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{
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//
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// Make sure the ITM/TPIU is not busy.
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//
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while (AM_REG(ITM, TCR) & AM_REG_ITM_TCR_BUSY(1));
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//
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// wait for 50us for the data to flush out
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//
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am_hal_flash_delay(FLASH_CYCLES_US(50));
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}
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//*****************************************************************************
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//
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//! @brief Enables tracing on a given set of ITM ports
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//!
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//! @param ui8portNum - Set ports to be enabled
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//!
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//! Enables tracing on the ports referred to by \e ui8portNum by writing the
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//! associated bit in the Trace Privilege Register in the ITM. The value for
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//! ui8portNum should be the logical OR one or more of the following values:
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//!
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//! \e ITM_PRIVMASK_0_7 - enable ports 0 through 7
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//! \e ITM_PRIVMASK_8_15 - enable ports 8 through 15
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//! \e ITM_PRIVMASK_16_23 - enable ports 16 through 23
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//! \e ITM_PRIVMASK_24_31 - enable ports 24 through 31
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_trace_port_enable(uint8_t ui8portNum)
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{
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AM_REGVAL(AM_REG_ITM_TPR_O) |= (0x00000001 << (ui8portNum>>3));
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}
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//*****************************************************************************
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//
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//! @brief Disable tracing on the given ITM stimulus port.
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//!
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//! @param ui8portNum
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//!
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//! Disables tracing on the ports referred to by \e ui8portNum by writing the
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//! associated bit in the Trace Privilege Register in the ITM. The value for
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//! ui8portNum should be the logical OR one or more of the following values:
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//!
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//! \e ITM_PRIVMASK_0_7 - disable ports 0 through 7
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//! \e ITM_PRIVMASK_8_15 - disable ports 8 through 15
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//! \e ITM_PRIVMASK_16_23 - disable ports 16 through 23
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//! \e ITM_PRIVMASK_24_31 - disable ports 24 through 31
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_trace_port_disable(uint8_t ui8portNum)
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{
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AM_REGVAL(AM_REG_ITM_TPR_O) &= ~(0x00000001 << (ui8portNum >> 3));
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}
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//*****************************************************************************
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//
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//! @brief Poll the given ITM stimulus register until not busy.
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//!
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//! @param ui32StimReg - stimulus register
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//!
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//! @return true if not busy, false if busy (timed out or other error).
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//
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//*****************************************************************************
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bool
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am_hal_itm_stimulus_not_busy(uint32_t ui32StimReg)
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{
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uint32_t ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
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//
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// Busy waiting until it is available, non-zero means ready.
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//
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while (!AM_REGVAL(ui32StimAddr));
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return true;
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}
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//*****************************************************************************
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//
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//! @brief Writes a 32-bit value to the given ITM stimulus register.
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//!
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//! @param ui32StimReg - stimulus register
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//! @param ui32Value - value to be written.
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//!
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//! Write a word to the desired stimulus register.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_stimulus_reg_word_write(uint32_t ui32StimReg, uint32_t ui32Value)
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{
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uint32_t ui32StimAddr;
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ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
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//
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// Busy waiting until it is available, non-zero means ready
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//
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while (!AM_REGVAL(ui32StimAddr));
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//
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// Write the register.
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//
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AM_REGVAL(ui32StimAddr) = ui32Value;
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}
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//*****************************************************************************
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//
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//! @brief Writes a short to the given ITM stimulus register.
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//!
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//! @param ui32StimReg - stimulus register
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//! @param ui16Value - short to be written.
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//!
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//! Write a short to the desired stimulus register.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_stimulus_reg_short_write(uint32_t ui32StimReg, uint16_t ui16Value)
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{
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uint32_t ui32StimAddr;
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ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
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//
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// Busy waiting until it is available non-zero means ready
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//
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while (!AM_REGVAL(ui32StimAddr));
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//
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// Write the register.
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//
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*((volatile uint16_t *) ui32StimAddr) = ui16Value;
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}
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//*****************************************************************************
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//
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//! @brief Writes a byte to the given ITM stimulus register.
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//!
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//! @param ui32StimReg - stimulus register
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//! @param ui8Value - byte to be written.
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//!
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//! Write a byte to the desired stimulus register.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_stimulus_reg_byte_write(uint32_t ui32StimReg, uint8_t ui8Value)
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{
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uint32_t ui32StimAddr;
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ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
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//
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// Busy waiting until it is available (non-zero means ready)
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//
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while (!AM_REGVAL(ui32StimAddr));
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//
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// Write the register.
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//
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*((volatile uint8_t *) ui32StimAddr) = ui8Value;
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}
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//*****************************************************************************
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//
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//! @brief Sends a Sync Packet.
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//!
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//! Sends a sync packet. This can be useful for external software should it
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//! become out of sync with the ITM stream.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_sync_send(void)
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{
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//
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// Write the register.
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//
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am_hal_itm_stimulus_reg_word_write(AM_HAL_ITM_SYNC_REG,
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AM_HAL_ITM_SYNC_VAL);
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}
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//*****************************************************************************
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//
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//! @brief Poll the print stimulus registers until not busy.
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//!
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//! @return true if not busy, false if busy (timed out or other error).
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//
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//*****************************************************************************
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bool
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am_hal_itm_print_not_busy(void)
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{
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//
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// Poll stimulus register allocated for printing.
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//
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am_hal_itm_stimulus_not_busy(0);
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return true;
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}
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//*****************************************************************************
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//
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//! @brief Prints a char string out of the ITM.
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//!
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//! @param pcString pointer to the character sting
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//!
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//! This function prints a sting out of the ITM.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_itm_print(char *pcString)
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{
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uint32_t ui32Length = 0;
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//
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// Determine the length of the string.
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//
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while (*(pcString + ui32Length))
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{
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ui32Length++;
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}
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//
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// If there is no longer a word left, empty out the remaining characters.
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//
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while (ui32Length)
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{
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//
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// Print string out the ITM.
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//
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am_hal_itm_stimulus_reg_byte_write(0, (uint8_t)*pcString++);
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//
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// Subtract from length.
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//
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ui32Length--;
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}
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}
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//*****************************************************************************
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//
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// End Doxygen group.
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//! @}
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//
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//*****************************************************************************
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