267 lines
7.9 KiB
C
267 lines
7.9 KiB
C
/*
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* Copyright (c) 2022 hpmicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Change Logs:
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* Date Author Notes
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* 2022-03-09 hpmicro First implementation
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* 2022-08-01 hpmicro Fixed random crashing during kvdb_init
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* 2022-08-03 hpmicro Improved erase speed
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*
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#ifdef RT_USING_FAL
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#include "fal.h"
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#include "hpm_romapi.h"
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#include "board.h"
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#include "hpm_l1c_drv.h"
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#if defined(FLASH_XIP) && (FLASH_XIP == 1)
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#define FAL_ENTER_CRITICAL() do {\
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rt_enter_critical();\
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disable_irq_from_intc();\
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fencei();\
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}while(0)
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#define FAL_EXIT_CRITICAL() do {\
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ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(BOARD_APP_XPI_NOR_XPI_BASE);\
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fencei();\
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rt_exit_critical();\
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enable_irq_from_intc();\
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}while(0)
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#define FAL_RAMFUNC __attribute__((section(".isr_vector")))
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#else
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#define FAL_ENTER_CRITICAL()
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#define FAL_EXIT_CRITICAL()
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#define FAL_RAMFUNC
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#endif
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/***************************************************************************************************
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* FAL Porting Guide
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*
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* 1. Most FLASH devices do not support RWW (Read-while-Write), the codes to access the FLASH
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* must be placed at RAM or ROM code
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* 2. During FLASH erase/program, it is recommended to disable the interrupt, or place the
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* interrupt related codes to RAM
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*
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***************************************************************************************************/
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static int init(void);
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static int read(long offset, uint8_t *buf, size_t size);
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static int write(long offset, const uint8_t *buf, size_t size);
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static int erase(long offset, size_t size);
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static xpi_nor_config_t s_flashcfg;
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/**
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* @brief FAL Flash device context
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*/
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struct fal_flash_dev nor_flash0 =
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{
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.name = NOR_FLASH_DEV_NAME,
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/* If porting this code to the device with FLASH connected to XPI1, the address must be changed to 0x90000000 */
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.addr = NOR_FLASH_MEM_BASE,
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.len = 8 * 1024 * 1024,
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.blk_size = 4096,
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.ops = { .init = init, .read = read, .write = write, .erase = erase },
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.write_gran = 1
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};
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/**
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* @brief FAL initialization
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* This function probes the FLASH using the ROM API
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*/
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FAL_RAMFUNC static int init(void)
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{
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int ret = RT_EOK;
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xpi_nor_config_option_t cfg_option;
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cfg_option.header.U = BOARD_APP_XPI_NOR_CFG_OPT_HDR;
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cfg_option.option0.U = BOARD_APP_XPI_NOR_CFG_OPT_OPT0;
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cfg_option.option1.U = BOARD_APP_XPI_NOR_CFG_OPT_OPT1;
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FAL_ENTER_CRITICAL();
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hpm_stat_t status = rom_xpi_nor_auto_config(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, &cfg_option);
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FAL_EXIT_CRITICAL();
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if (status != status_success)
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{
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ret = -RT_ERROR;
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}
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else
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{
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/* update the flash chip information */
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uint32_t sector_size;
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rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_sector_size, §or_size);
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uint32_t flash_size;
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rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_total_size, &flash_size);
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nor_flash0.blk_size = sector_size;
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nor_flash0.len = flash_size;
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}
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return ret;
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}
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/**
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* @brief FAL read function
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* Read data from FLASH
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* @param offset FLASH offset
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* @param buf Buffer to hold data read by this API
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* @param size Size of data to be read
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* @return actual read bytes
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*/
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FAL_RAMFUNC static int read(long offset, uint8_t *buf, size_t size)
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{
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uint32_t flash_addr = nor_flash0.addr + offset;
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uint32_t aligned_start = HPM_L1C_CACHELINE_ALIGN_DOWN(flash_addr);
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uint32_t aligned_end = HPM_L1C_CACHELINE_ALIGN_UP(flash_addr + size);
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uint32_t aligned_size = aligned_end - aligned_start;
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rt_base_t level = rt_hw_interrupt_disable();
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l1c_dc_invalidate(aligned_start, aligned_size);
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rt_hw_interrupt_enable(level);
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(void) rt_memcpy(buf, (void*) flash_addr, size);
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return size;
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}
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/**
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* @brief Write unaligned data to the page
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* @param offset FLASH offset
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* @param buf Data buffer
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* @param size Size of data to be written
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* @return actual size of written data or error code
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*/
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FAL_RAMFUNC static int write_unaligned_page_data(long offset, const uint32_t *buf, size_t size)
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{
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hpm_stat_t status;
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FAL_ENTER_CRITICAL();
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status = rom_xpi_nor_program(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, buf, offset, size);
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FAL_EXIT_CRITICAL();
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if (status != status_success)
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{
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return -RT_ERROR;
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rt_kprintf("write failed, status=%d\n", status);
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}
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return size;
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}
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/**
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* @brief FAL write function
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* Write data to specified FLASH address
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* @param offset FLASH offset
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* @param buf Data buffer
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* @param size Size of data to be written
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* @return actual size of written data or error code
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*/
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FAL_RAMFUNC static int write(long offset, const uint8_t *buf, size_t size)
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{
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uint32_t *src = NULL;
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uint32_t buf_32[64];
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uint32_t write_size;
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size_t remaining_size = size;
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int ret = (int)size;
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uint32_t page_size;
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rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_page_size, &page_size);
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uint32_t offset_in_page = offset % page_size;
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if (offset_in_page != 0)
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{
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uint32_t write_size_in_page = page_size - offset_in_page;
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uint32_t write_page_size = MIN(write_size_in_page, size);
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(void) rt_memcpy(buf_32, buf, write_page_size);
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write_size = write_unaligned_page_data(offset, buf_32, write_page_size);
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if (write_size < 0)
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{
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ret = -RT_ERROR;
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goto write_quit;
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}
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remaining_size -= write_page_size;
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offset += write_page_size;
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buf += write_page_size;
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}
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while (remaining_size > 0)
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{
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write_size = MIN(remaining_size, sizeof(buf_32));
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rt_memcpy(buf_32, buf, write_size);
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src = &buf_32[0];
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FAL_ENTER_CRITICAL();
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hpm_stat_t status = rom_xpi_nor_program(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, src,
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offset, write_size);
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FAL_EXIT_CRITICAL();
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if (status != status_success)
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{
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ret = -RT_ERROR;
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rt_kprintf("write failed, status=%d\n", status);
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break;
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}
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remaining_size -= write_size;
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buf += write_size;
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offset += write_size;
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}
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write_quit:
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return ret;
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}
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/**
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* @brief FAL erase function
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* Erase specified FLASH region
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* @param offset the start FLASH address to be erased
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* @param size size of the region to be erased
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* @ret RT_EOK Erase operation is successful
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* @retval -RT_ERROR Erase operation failed
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*/
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FAL_RAMFUNC static int erase(long offset, size_t size)
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{
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uint32_t aligned_size = (size + nor_flash0.blk_size - 1U) & ~(nor_flash0.blk_size - 1U);
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hpm_stat_t status;
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int ret = (int)size;
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uint32_t block_size;
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uint32_t sector_size;
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(void) rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_sector_size, §or_size);
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(void) rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_block_size, &block_size);
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uint32_t erase_unit;
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while (aligned_size > 0)
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{
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FAL_ENTER_CRITICAL();
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if ((offset % block_size == 0) && (aligned_size >= block_size))
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{
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erase_unit = block_size;
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status = rom_xpi_nor_erase_block(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, offset);
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}
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else
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{
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erase_unit = sector_size;
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status = rom_xpi_nor_erase_sector(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, offset);
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}
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FAL_EXIT_CRITICAL();
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if (status != status_success)
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{
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ret = -RT_ERROR;
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break;
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}
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offset += erase_unit;
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aligned_size -= erase_unit;
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}
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return ret;
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}
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#endif /* RT_USING_FAL */
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