85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-10-18 Raman Gopalan Initial version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "gpio.h"
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#include <rtdbg.h>
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#ifdef RT_USING_PIN
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static void at32uc3b0_pin_mode(struct rt_device *dev, rt_base_t pin, rt_uint8_t mode)
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{
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RT_ASSERT((AVR32_PIN_PA03 <= pin) && (pin <= AVR32_PIN_PB11));
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/* Pointer to the register set for this GPIO port */
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volatile avr32_gpio_port_t *gpio_regs = &AVR32_GPIO.port[pin >> 5];
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/* Decide based on required mode */
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switch (mode)
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{
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case PIN_MODE_OUTPUT:
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gpio_regs->oders = 1 << (pin & 0x1F); /* Enable output driver */
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gpio_regs->gpers = 1 << (pin & 0x1F); /* Make GPIO control this pin */
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break;
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case PIN_MODE_INPUT:
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gpio_regs->oderc = 1 << (pin & 0x1F);
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gpio_regs->gpers = 1 << (pin & 0x1F);
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break;
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case PIN_MODE_INPUT_PULLUP:
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gpio_regs->puers = 1 << (pin & 0x1F);
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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LOG_W("Pull-down enable register not defined for AT32UC3B.");
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break;
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case PIN_MODE_OUTPUT_OD:
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LOG_W("The open-drain mode is not synthesized on the current AVR32 products.");
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break;
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}
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}
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static void at32uc3b0_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t value)
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{
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RT_ASSERT((AVR32_PIN_PA03 <= pin) && (pin <= AVR32_PIN_PB11));
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if (value == PIN_HIGH)
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{
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gpio_set_gpio_pin(pin);
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}
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else
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{
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gpio_clr_gpio_pin(pin);
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}
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}
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static rt_int8_t at32uc3b0_pin_read(struct rt_device *device, rt_base_t pin)
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{
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RT_ASSERT((AVR32_PIN_PA03 <= pin) && (pin <= AVR32_PIN_PB11));
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return (gpio_get_pin_value(pin) ? PIN_HIGH : PIN_LOW);
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}
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static const struct rt_pin_ops ops =
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{
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at32uc3b0_pin_mode,
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at32uc3b0_pin_write,
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at32uc3b0_pin_read,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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};
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int rt_hw_gpio_init(void)
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{
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rt_device_pin_register("gpio", &ops, RT_NULL);
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return 0;
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}
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#endif /* RT_USING_PIN */
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