134 lines
5.5 KiB
C
134 lines
5.5 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-06 SummerGift change to new framework
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*/
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#ifndef __SPI_CONFIG_H__
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#define __SPI_CONFIG_H__
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#include <rtthread.h>
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#ifdef BSP_USING_SPI1
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#define SPI1_BUS_CONFIG \
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{ \
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.Instance = SPI1, \
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.bus_name = "spi1", \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_rx.Instance = DMA2_Stream2, \
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.dma_rx.channel = DMA_CHANNEL_3, \
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.dma_rx.dma_irq = DMA2_Stream2_IRQn, \
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.dma_tx.Instance = DMA2_Stream3, \
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.dma_tx.channel = DMA_CHANNEL_3, \
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.dma_tx.dma_irq = DMA2_Stream3_IRQn, \
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}
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#define SPI1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
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#define SPI1_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler
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#endif
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#ifdef BSP_USING_SPI2
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#define SPI2_BUS_CONFIG \
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{ \
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.Instance = SPI2, \
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.bus_name = "spi2", \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA1EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA1EN, \
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.dma_rx.Instance = DMA1_Stream3, \
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.dma_rx.channel = DMA_CHANNEL_0, \
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.dma_rx.dma_irq = DMA1_Stream3_IRQn, \
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.dma_tx.Instance = DMA1_Stream4, \
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.dma_tx.channel = DMA_CHANNEL_0, \
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.dma_tx.dma_irq = DMA1_Stream4_IRQn, \
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}
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#define SPI2_DMA_RX_IRQHandler DMA1_Stream3_IRQHandler
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#define SPI2_DMA_TX_IRQHandler DMA1_Stream4_IRQHandler
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#endif
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#ifdef BSP_USING_SPI3
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#define SPI3_BUS_CONFIG \
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{ \
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.Instance = SPI3, \
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.bus_name = "spi3", \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA1EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA1EN, \
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.dma_rx.Instance = DMA1_Stream0, \
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.dma_rx.channel = DMA_CHANNEL_0, \
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.dma_rx.dma_irq = DMA1_Stream0_IRQn, \
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.dma_tx.Instance = DMA1_Stream7, \
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.dma_tx.channel = DMA_CHANNEL_0, \
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.dma_tx.dma_irq = DMA1_Stream7_IRQn, \
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}
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#define SPI3_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler
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#define SPI3_DMA_TX_IRQHandler DMA1_Stream7_IRQHandler
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#endif
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#ifdef BSP_USING_SPI4
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#define SPI4_BUS_CONFIG \
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{ \
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.Instance = SPI4, \
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.bus_name = "spi4", \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_rx.Instance = DMA2_Stream0, \
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.dma_rx.channel = DMA_CHANNEL_4, \
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.dma_rx.dma_irq = DMA2_Stream0_IRQn, \
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.dma_tx.Instance = DMA2_Stream1, \
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.dma_tx.channel = DMA_CHANNEL_4, \
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.dma_tx.dma_irq = DMA2_Stream1_IRQn, \
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}
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#define SPI4_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
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#define SPI4_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler
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#endif
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#ifdef BSP_USING_SPI5
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#define SPI5_BUS_CONFIG \
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{ \
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.Instance = SPI5, \
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.bus_name = "spi5", \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_rx.Instance = DMA2_Stream3, \
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.dma_rx.channel = DMA_CHANNEL_2, \
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.dma_rx.dma_irq = DMA2_Stream3_IRQn, \
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.dma_tx.Instance = DMA2_Stream4, \
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.dma_tx.channel = DMA_CHANNEL_2, \
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.dma_tx.dma_irq = DMA2_Stream4_IRQn, \
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}
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#define SPI5_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler
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#define SPI5_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler
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#endif
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#ifdef BSP_USING_SPI6
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#define SPI5_BUS_CONFIG \
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{ \
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.Instance = SPI6, \
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.bus_name = "spi6", \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_rx.Instance = DMA2_Stream6, \
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.dma_rx.channel = DMA_CHANNEL_1, \
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.dma_rx.dma_irq = DMA2_Stream6_IRQn, \
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.dma_tx.Instance = DMA2_Stream5, \
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.dma_tx.channel = DMA_CHANNEL_1, \
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.dma_tx.dma_irq = DMA2_Stream5_IRQn, \
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}
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#define SPI6_DMA_RX_IRQHandler DMA2_Stream6_IRQHandler
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#define SPI6_DMA_TX_IRQHandler DMA2_Stream5_IRQHandler
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#endif
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#endif /*__SPI_CONFIG_H__ */
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