538 lines
25 KiB
C
538 lines
25 KiB
C
/**************************************************************************//**
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* @file nu_uart.h
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* @version V3.00
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* @brief M460 series UART driver header file
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*
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* @copyright SPDX-License-Identifier: Apache-2.0
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* @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __NU_UART_H__
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#define __NU_UART_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup UART_Driver UART Driver
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@{
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*/
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/** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
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@{
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*/
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART FIFO size constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART2_FIFO_SIZE 16ul /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART3_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART4_FIFO_SIZE 16ul /*!< UART4 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART5_FIFO_SIZE 16ul /*!< UART5 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART6_FIFO_SIZE 16ul /*!< UART6 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART7_FIFO_SIZE 16ul /*!< UART7 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART8_FIFO_SIZE 16ul /*!< UART8 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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#define UART9_FIFO_SIZE 16ul /*!< UART9 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART_FIFO constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */
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#define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */
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#define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */
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#define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */
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#define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */
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#define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */
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#define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */
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#define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART_LINE constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */
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#define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */
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#define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */
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#define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */
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#define UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */
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#define UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */
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#define UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */
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#define UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */
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#define UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */
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#define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */
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#define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */
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#define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART RTS ACTIVE LEVEL constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */
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#define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART_IRDA constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */
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#define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART_FUNCSEL constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */
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#define UART_FUNCSEL_LIN (0x1ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function \hideinitializer */
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#define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */
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#define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */
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#define UART_FUNCSEL_SINGLE_WIRE (0x4ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set Single Wire Function */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART_LINCTL constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 \hideinitializer */
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#define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 \hideinitializer */
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#define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field \hideinitializer */
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#define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field \hideinitializer */
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#define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field \hideinitializer */
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#define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value \hideinitializer */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART BAUDRATE MODE constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */
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#define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */
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/*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
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/** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
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@{
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*/
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/**
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* @brief Calculate UART baudrate mode0 divider
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*
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* @param[in] u32SrcFreq UART clock frequency
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* @param[in] u32BaudRate Baudrate of UART module
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*
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* @return UART baudrate mode0 divider
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*
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* @details This macro calculate UART baudrate mode0 divider.
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* \hideinitializer
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*/
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#define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul)
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/**
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* @brief Calculate UART baudrate mode2 divider
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*
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* @param[in] u32SrcFreq UART clock frequency
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* @param[in] u32BaudRate Baudrate of UART module
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*
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* @return UART baudrate mode2 divider
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*
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* @details This macro calculate UART baudrate mode2 divider.
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* \hideinitializer
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*/
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#define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul)
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/**
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* @brief Write UART data
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*
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* @param[in] uart The pointer of the specified UART module
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* @param[in] u8Data Data byte to transmit.
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*
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* @return None
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*
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* @details This macro write Data to Tx data register.
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* \hideinitializer
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*/
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#define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
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/**
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* @brief Read UART data
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @return The oldest data byte in RX FIFO.
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*
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* @details This macro read Rx data register.
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* \hideinitializer
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*/
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#define UART_READ(uart) ((uart)->DAT)
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/**
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* @brief Get Tx empty
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Tx FIFO is not empty
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* @retval >=1 Tx FIFO is empty
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*
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* @details This macro get Transmitter FIFO empty register value.
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* \hideinitializer
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*/
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#define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
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/**
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* @brief Get Rx empty
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Rx FIFO is not empty
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* @retval >=1 Rx FIFO is empty
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*
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* @details This macro get Receiver FIFO empty register value.
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* \hideinitializer
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*/
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#define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
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/**
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* @brief Check specified UART port transmission is over.
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Tx transmission is not over
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* @retval 1 Tx transmission is over
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*
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* @details This macro return Transmitter Empty Flag register bit value.
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* It indicates if specified UART port transmission is over nor not.
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* \hideinitializer
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*/
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#define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
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/**
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* @brief Wait specified UART port transmission is over
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @return None
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*
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* @details This macro wait specified UART port transmission is over.
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* \hideinitializer
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*/
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#define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
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/**
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* @brief Check RX is ready or not
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 The number of bytes in the RX FIFO is less than the RFITL
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* @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
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*
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* @details This macro check receive data available interrupt flag is set or not.
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* \hideinitializer
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*/
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#define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
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/**
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* @brief Check TX FIFO is full or not
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 1 TX FIFO is full
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* @retval 0 TX FIFO is not full
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*
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* @details This macro check TX FIFO is full or not.
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* \hideinitializer
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*/
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#define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
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/**
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* @brief Check RX FIFO is full or not
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 1 RX FIFO is full
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* @retval 0 RX FIFO is not full
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*
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* @details This macro check RX FIFO is full or not.
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* \hideinitializer
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*/
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#define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
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/**
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* @brief Get Tx full register value
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Tx FIFO is not full.
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* @retval >=1 Tx FIFO is full.
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*
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* @details This macro get Tx full register value.
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* \hideinitializer
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*/
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#define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
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/**
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* @brief Get Rx full register value
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Rx FIFO is not full.
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* @retval >=1 Rx FIFO is full.
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*
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* @details This macro get Rx full register value.
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* \hideinitializer
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*/
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#define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
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/**
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* @brief Rx Idle Status register value
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Rx is busy.
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* @retval 1 Rx is Idle(Default)
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*
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* @details This macro get Rx Idle Status register value.
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* \hideinitializer
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*/
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#define UART_RX_IDLE(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXIDLE_Msk )>> UART_FIFOSTS_RXIDLE_Pos)
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/**
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* @brief Enable specified UART interrupt
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*
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* @param[in] uart The pointer of the specified UART module
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* @param[in] u32eIntSel Interrupt type select
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* - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty Interrupt
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* - \ref UART_INTEN_ABRIEN_Msk : Single-wire Bit Error Detection Interrupt
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* - \ref UART_INTEN_SWBEIEN_Msk : Auto-baud Rate Interrupt
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* - \ref UART_INTEN_LINIEN_Msk : Lin Bus Interrupt
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* - \ref UART_INTEN_WKIEN_Msk : Wake-up Interrupt
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* - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error Interrupt
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* - \ref UART_INTEN_RXTOIEN_Msk : Rx Time-out Interrupt
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* - \ref UART_INTEN_MODEMIEN_Msk : MODEM Status Interrupt
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* - \ref UART_INTEN_RLSIEN_Msk : Receive Line Status Interrupt
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* - \ref UART_INTEN_THREIEN_Msk : Transmit Holding Register Empty Interrupt
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* - \ref UART_INTEN_RDAIEN_Msk : Receive Data Available Interrupt
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*
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* @return None
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*
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* @details This macro enable specified UART interrupt.
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* \hideinitializer
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*/
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#define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
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/**
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* @brief Disable specified UART interrupt
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*
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* @param[in] uart The pointer of the specified UART module
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* @param[in] u32eIntSel Interrupt type select
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* - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty Interrupt
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* - \ref UART_INTEN_ABRIEN_Msk : Single-wire Bit Error Detection Interrupt
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* - \ref UART_INTEN_SWBEIEN_Msk : Auto-baud Rate Interrupt
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* - \ref UART_INTEN_LINIEN_Msk : Lin Bus Interrupt
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* - \ref UART_INTEN_WKIEN_Msk : Wake-up Interrupt
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* - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error Interrupt
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* - \ref UART_INTEN_RXTOIEN_Msk : Rx Time-out Interrupt
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* - \ref UART_INTEN_MODEMIEN_Msk : MODEM Status Interrupt
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* - \ref UART_INTEN_RLSIEN_Msk : Receive Line Status Interrupt
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* - \ref UART_INTEN_THREIEN_Msk : Transmit Holding Register Empty Interrupt
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* - \ref UART_INTEN_RDAIEN_Msk : Receive Data Available Interrupt
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*
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* @return None
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*
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* @details This macro disable specified UART interrupt.
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* \hideinitializer
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*/
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#define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
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/**
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* @brief Get specified interrupt flag/status
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*
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* @param[in] uart The pointer of the specified UART module
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* @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
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* - \ref UART_INTSTS_ABRINT_Msk : Auto-baud Rate Interrupt Indicator
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* - \ref UART_INTSTS_HWBUFEINT_Msk : PDMA Mode Buffer Error Interrupt Indicator
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* - \ref UART_INTSTS_HWTOINT_Msk : PDMA Mode Rx Time-out Interrupt Indicator
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* - \ref UART_INTSTS_HWMODINT_Msk : PDMA Mode MODEM Status Interrupt Indicator
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* - \ref UART_INTSTS_HWRLSINT_Msk : PDMA Mode Receive Line Status Interrupt Indicator
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* - \ref UART_INTSTS_TXENDINT_Msk : Transmitter Empty Interrupt Indicator
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* - \ref UART_INTSTS_SWBEINT_Msk : Single-wire Bit Error Detect Interrupt Indicator
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* - \ref UART_INTSTS_TXENDIF_Msk : Transmitter Empty Interrupt Flag
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* - \ref UART_INTSTS_HWBUFEIF_Msk : PDMA Mode Buffer Error Interrupt Flag
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* - \ref UART_INTSTS_HWTOIF_Msk : PDMA Mode Time-out Interrupt Flag
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* - \ref UART_INTSTS_HWMODIF_Msk : PDMA Mode MODEM Status Interrupt Flag
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* - \ref UART_INTSTS_HWRLSIF_Msk : PDMA Mode Receive Line Status Flag
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* - \ref UART_INTSTS_SWBEIF_Msk : Single-wire Bit Error Detect Interrupt Flag
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* - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator
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* - \ref UART_INTSTS_WKINT_Msk : Wake-up Interrupt Indicator
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* - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
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* - \ref UART_INTSTS_RXTOINT_Msk : Rx Time-out Interrupt Indicator
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* - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
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* - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
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* - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
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* - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
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* - \ref UART_INTSTS_LINIF_Msk : LIN Bus Interrupt Flag
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* - \ref UART_INTSTS_WKIF_Msk : Wake-up Interrupt Flag
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* - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
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* - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
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* - \ref UART_INTSTS_MODEMIF_Msk : MODEM Status Interrupt Flag
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* - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
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* - \ref UART_INTSTS_THREIF_Msk : Transmit Holding Register Empty Interrupt Flag
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* - \ref UART_INTSTS_RDAIF_Msk : Receive Data Available Interrupt Flag
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*
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* @retval 0 The specified interrupt is not happened.
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* 1 The specified interrupt is happened.
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*
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* @details This macro get specified interrupt flag or interrupt indicator status.
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* \hideinitializer
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*/
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#define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
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/**
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* @brief Clear RS-485 Address Byte Detection Flag
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @return None
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*
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* @details This macro clear RS-485 address byte detection flag.
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* \hideinitializer
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*/
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#define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
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/**
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* @brief Get RS-485 Address Byte Detection Flag
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*
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* @param[in] uart The pointer of the specified UART module
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*
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* @retval 0 Receiver detects a data that is not an address bit.
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* @retval 1 Receiver detects a data that is an address bit.
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*
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* @details This macro get RS-485 address byte detection flag.
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* \hideinitializer
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*/
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#define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
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/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
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__STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart);
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__STATIC_INLINE void UART_SET_RTS(UART_T *uart);
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/**
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|
* @brief Set RTS pin to low
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|
*
|
|
* @param[in] uart The pointer of the specified UART module
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|
*
|
|
* @return None
|
|
*
|
|
* @details This macro set RTS pin to low.
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|
* \hideinitializer
|
|
*/
|
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__STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart)
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|
{
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uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
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|
uart->MODEM &= ~UART_MODEM_RTS_Msk;
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|
}
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|
|
|
|
|
/**
|
|
* @brief Set RTS pin to high
|
|
*
|
|
* @param[in] uart The pointer of the specified UART module
|
|
*
|
|
* @return None
|
|
*
|
|
* @details This macro set RTS pin to high.
|
|
* \hideinitializer
|
|
*/
|
|
__STATIC_INLINE void UART_SET_RTS(UART_T *uart)
|
|
{
|
|
uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
|
|
}
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|
|
|
/**
|
|
* @brief Enable specified UART PDMA function
|
|
*
|
|
* @param[in] uart The pointer of the specified UART module
|
|
* @param[in] u32FuncSel Combination of following functions
|
|
* - \ref UART_INTEN_TXPDMAEN_Msk
|
|
* - \ref UART_INTEN_RXPDMAEN_Msk
|
|
*
|
|
* @return None
|
|
*
|
|
* @details This macro enable specified UART PDMA function.
|
|
* \hideinitializer
|
|
*/
|
|
#define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel))
|
|
/**
|
|
* @brief Disable specified UART PDMA function
|
|
*
|
|
* @param[in] uart The pointer of the specified UART module
|
|
* @param[in] u32FuncSel Combination of following functions
|
|
* - \ref UART_INTEN_TXPDMAEN_Msk
|
|
* - \ref UART_INTEN_RXPDMAEN_Msk
|
|
*
|
|
* @return None
|
|
*
|
|
* @details This macro disable specified UART PDMA function.
|
|
* \hideinitializer
|
|
*/
|
|
#define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
|
|
|
|
|
|
void UART_ClearIntFlag(UART_T *uart, uint32_t u32InterruptFlag);
|
|
void UART_Close(UART_T *uart);
|
|
void UART_DisableFlowCtrl(UART_T *uart);
|
|
void UART_DisableInt(UART_T *uart, uint32_t u32InterruptFlag);
|
|
void UART_EnableFlowCtrl(UART_T *uart);
|
|
void UART_EnableInt(UART_T *uart, uint32_t u32InterruptFlag);
|
|
void UART_Open(UART_T *uart, uint32_t u32baudrate);
|
|
uint32_t UART_Read(UART_T *uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes);
|
|
void UART_SetLineConfig(UART_T *uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
|
|
void UART_SetTimeoutCnt(UART_T *uart, uint32_t u32TOC);
|
|
void UART_SelectIrDAMode(UART_T *uart, uint32_t u32Buadrate, uint32_t u32Direction);
|
|
void UART_SelectRS485Mode(UART_T *uart, uint32_t u32Mode, uint32_t u32Addr);
|
|
void UART_SelectLINMode(UART_T *uart, uint32_t u32Mode, uint32_t u32BreakLength);
|
|
uint32_t UART_Write(UART_T *uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes);
|
|
void UART_SelectSingleWireMode(UART_T *uart);
|
|
|
|
|
|
|
|
/*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
|
|
|
|
/*@}*/ /* end of group UART_Driver */
|
|
|
|
/*@}*/ /* end of group Standard_Driver */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /*__NU_UART_H__*/
|