393 lines
11 KiB
C
393 lines
11 KiB
C
/*
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* File : board.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-09-22 Bernard add board.h to this bsp
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*/
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// <<< Use Configuration Wizard in Context Menu >>>
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <stm32f4xx.h>
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#include <stm32f4xx_hal.h>
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#include <rtthread.h>
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#if \
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defined(SOC_STM32F410T8)||\
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defined(SOC_STM32F410TB)
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#define STM32F4xx_PIN_NUMBERS 36
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#elif \
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defined(SOC_STM32F401CB)||\
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defined(SOC_STM32F401CC)||\
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defined(SOC_STM32F401CD)||\
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defined(SOC_STM32F401CE)||\
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defined(SOC_STM32F410C8)||\
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defined(SOC_STM32F410CB)||\
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defined(SOC_STM32F411CC)||\
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defined(SOC_STM32F411CE)||\
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defined(SOC_STM32F412CEU)||\
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defined(SOC_STM32F412CGU)||\
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defined(SOC_STM32F413CH)||\
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defined(SOC_STM32F413CG)||\
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defined(SOC_STM32F423CH)
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#define STM32F4xx_PIN_NUMBERS 48
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#elif \
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defined(SOC_STM32F405RG)||\
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defined(SOC_STM32F415RG)||\
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defined(SOC_STM32F401RB)||\
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defined(SOC_STM32F401RC)||\
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defined(SOC_STM32F401RD)||\
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defined(SOC_STM32F401RE)||\
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defined(SOC_STM32F410R8)||\
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defined(SOC_STM32F410RB)||\
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defined(SOC_STM32F411RC)||\
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defined(SOC_STM32F411RE)||\
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defined(SOC_STM32F446RC)||\
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defined(SOC_STM32F446RE)||\
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defined(SOC_STM32F412RET)||\
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defined(SOC_STM32F412RGT)||\
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defined(SOC_STM32F412REY)||\
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defined(SOC_STM32F412RGY)||\
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defined(SOC_STM32F413RH)||\
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defined(SOC_STM32F413RG)||\
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defined(SOC_STM32F423RH)
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#define STM32F4xx_PIN_NUMBERS 64
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#elif \
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defined(SOC_STM32F446MC)||\
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defined(SOC_STM32F446ME)||\
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defined(SOC_STM32F413MH)||\
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defined(SOC_STM32F413MG)
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#define STM32F4xx_PIN_NUMBERS 81
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#elif \
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defined(SOC_STM32F405VG)||\
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defined(SOC_STM32F415VG)||\
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defined(SOC_STM32F407VG)||\
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defined(SOC_STM32F407VE)||\
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defined(SOC_STM32F417VG)||\
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defined(SOC_STM32F417VE)||\
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defined(SOC_STM32F427VG)||\
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defined(SOC_STM32F427VI)||\
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defined(SOC_STM32F437VG)||\
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defined(SOC_STM32F437VI)||\
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defined(SOC_STM32F429VG)||\
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defined(SOC_STM32F429VI)||\
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defined(SOC_STM32F439VG)||\
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defined(SOC_STM32F439VI)||\
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defined(SOC_STM32F401VB)||\
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defined(SOC_STM32F401VC)||\
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defined(SOC_STM32F401VD)||\
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defined(SOC_STM32F401VE)||\
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defined(SOC_STM32F411VC)||\
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defined(SOC_STM32F411VE)||\
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defined(SOC_STM32F446VC)||\
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defined(SOC_STM32F446VE)||\
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defined(SOC_STM32F412VET)||\
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defined(SOC_STM32F412VGT)||\
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defined(SOC_STM32F412VEH)||\
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defined(SOC_STM32F412VGH)||\
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defined(SOC_STM32F413VH)||\
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defined(SOC_STM32F413VG)||\
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defined(SOC_STM32F423VH)
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#define STM32F4xx_PIN_NUMBERS 100
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#elif \
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defined(SOC_STM32F405ZG)||\
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defined(SOC_STM32F415ZG)||\
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defined(SOC_STM32F407ZG)||\
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defined(SOC_STM32F407ZE)||\
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defined(SOC_STM32F417ZG)||\
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defined(SOC_STM32F417ZE)||\
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defined(SOC_STM32F427ZG)||\
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defined(SOC_STM32F427ZI)||\
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defined(SOC_STM32F437ZG)||\
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defined(SOC_STM32F437ZI)||\
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defined(SOC_STM32F429ZG)||\
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defined(SOC_STM32F429ZI)||\
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defined(SOC_STM32F439ZG)||\
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defined(SOC_STM32F439ZI)||\
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defined(SOC_STM32F446ZC)||\
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defined(SOC_STM32F446ZE)||\
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defined(SOC_STM32F412ZET)||\
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defined(SOC_STM32F412ZGT)||\
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defined(SOC_STM32F412ZEJ)||\
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defined(SOC_STM32F412ZGJ)||\
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defined(SOC_STM32F413ZH)||\
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defined(SOC_STM32F413ZG)||\
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defined(SOC_STM32F423ZH)
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#define STM32F4xx_PIN_NUMBERS 144
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#elif \
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defined(SOC_STM32F469AI)||\
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defined(SOC_STM32F469AG)||\
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defined(SOC_STM32F469AE)||\
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defined(SOC_STM32F479AI)||\
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defined(SOC_STM32F479AG)
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#define STM32F4xx_PIN_NUMBERS 169
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#elif \
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defined(SOC_STM32F407IG)||\
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defined(SOC_STM32F407IE)||\
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defined(SOC_STM32F417IG)||\
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defined(SOC_STM32F417IE)||\
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defined(SOC_STM32F427IG)||\
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defined(SOC_STM32F427II)||\
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defined(SOC_STM32F437IG)||\
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defined(SOC_STM32F437II)||\
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defined(SOC_STM32F429IG)||\
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defined(SOC_STM32F429II)||\
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defined(SOC_STM32F439IG)||\
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defined(SOC_STM32F439II)||\
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defined(SOC_STM32F469II)||\
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defined(SOC_STM32F469IG)||\
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defined(SOC_STM32F469IE)||\
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defined(SOC_STM32F479II)||\
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defined(SOC_STM32F479IG)
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#define STM32F4xx_PIN_NUMBERS 176
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#elif \
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defined(SOC_STM32F429BG)||\
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defined(SOC_STM32F429BI)||\
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defined(SOC_STM32F439BG)||\
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defined(SOC_STM32F439BI)||\
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defined(SOC_STM32F469BI)||\
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defined(SOC_STM32F469BG)||\
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defined(SOC_STM32F469BE)||\
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defined(SOC_STM32F479BI)||\
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defined(SOC_STM32F479BG)
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#define STM32F4xx_PIN_NUMBERS 208
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#elif \
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defined(SOC_STM32F429NG)||\
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defined(SOC_STM32F439NI)||\
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defined(SOC_STM32F439NG)||\
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defined(SOC_STM32F439NI)||\
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defined(SOC_STM32F469NI)||\
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defined(SOC_STM32F469NG)||\
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defined(SOC_STM32F469NE)||\
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defined(SOC_STM32F479NI)||\
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defined(SOC_STM32F479NG)
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#define STM32F4xx_PIN_NUMBERS 216
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#endif
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#if \
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defined(SOC_STM32F405RG)||\
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defined(SOC_STM32F405VG)||\
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defined(SOC_STM32F405ZG)
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//#define STM32F405xx
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#define STM32_SRAM_SIZE 192-64
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#elif \
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defined(SOC_STM32F415RG)||\
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defined(SOC_STM32F415VG)||\
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defined(SOC_STM32F415ZG)
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//#define STM32F415xx
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#define STM32_SRAM_SIZE 192-64
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#elif \
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defined(SOC_STM32F407VG)||\
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defined(SOC_STM32F407VE)||\
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defined(SOC_STM32F407ZG)||\
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defined(SOC_STM32F407ZE)||\
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defined(SOC_STM32F407IG)||\
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defined(SOC_STM32F407IE)
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//#define STM32F407xx
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#define STM32_SRAM_SIZE 192-64
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#elif \
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defined(SOC_STM32F417VG)||\
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defined(SOC_STM32F417VE)||\
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defined(SOC_STM32F417ZG)||\
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defined(SOC_STM32F417ZE)||\
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defined(SOC_STM32F417IG)||\
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defined(SOC_STM32F417IE)
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//#define STM32F417xx
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#define STM32_SRAM_SIZE 192-64
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#elif \
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defined(SOC_STM32F427VG)||\
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defined(SOC_STM32F427VI)||\
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defined(SOC_STM32F427ZG)||\
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defined(SOC_STM32F427ZI)||\
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defined(SOC_STM32F427IG)||\
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defined(SOC_STM32F427II)
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//#define STM32F427xx
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#define STM32_SRAM_SIZE 256-64
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#elif \
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defined(SOC_STM32F437VG)||\
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defined(SOC_STM32F437VI)||\
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defined(SOC_STM32F437ZG)||\
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defined(SOC_STM32F437ZI)||\
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defined(SOC_STM32F437IG)||\
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defined(SOC_STM32F437II)
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//#define STM32F437xx
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#define STM32_SRAM_SIZE 256-64
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#elif \
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defined(SOC_STM32F429VG)||\
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defined(SOC_STM32F429VI)||\
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defined(SOC_STM32F429ZG)||\
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defined(SOC_STM32F429ZI)||\
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defined(SOC_STM32F429BG)||\
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defined(SOC_STM32F429BI)||\
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defined(SOC_STM32F429NG)||\
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defined(SOC_STM32F429NI)||\
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defined(SOC_STM32F429IG)||\
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defined(SOC_STM32F429II)
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//#define STM32F429xx
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#define STM32_SRAM_SIZE 256-64
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#elif \
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defined(SOC_STM32F439VG)||\
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defined(SOC_STM32F439VI)||\
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defined(SOC_STM32F439ZG)||\
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defined(SOC_STM32F439ZI)||\
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defined(SOC_STM32F439BG)||\
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defined(SOC_STM32F439BI)||\
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defined(SOC_STM32F439NG)||\
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defined(SOC_STM32F439NI)||\
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defined(SOC_STM32F439IG)||\
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defined(SOC_STM32F439II)
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//#define STM32F439xx
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#define STM32_SRAM_SIZE 256-64
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#elif \
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defined(SOC_STM32F401CB)||\
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defined(SOC_STM32F401CC)||\
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defined(SOC_STM32F401RB)||\
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defined(SOC_STM32F401RC)||\
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defined(SOC_STM32F401VB)||\
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defined(SOC_STM32F401VC)
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//#define STM32F401xC
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#define STM32_SRAM_SIZE 64
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#elif \
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defined(SOC_STM32F401CD)||\
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defined(SOC_STM32F401RD)||\
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defined(SOC_STM32F401VD)||\
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defined(SOC_STM32F401CE)||\
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defined(SOC_STM32F401RE)||\
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defined(SOC_STM32F401VE)
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//#define STM32F401xE
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#define STM32_SRAM_SIZE 96
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#elif \
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defined(SOC_STM32F410T8)||\
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defined(SOC_STM32F410TB)
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//#define STM32F410Tx
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#define STM32_SRAM_SIZE 32
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#elif \
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defined(SOC_STM32F410C8)||\
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defined(SOC_STM32F410CB)
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//#define STM32F410Cx
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#define STM32_SRAM_SIZE 32
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#elif \
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defined(SOC_STM32F410R8)||\
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defined(SOC_STM32F410RB)
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//#define STM32F410Rx
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#define STM32_SRAM_SIZE 32
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#elif \
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defined(SOC_STM32F411CC)||\
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defined(SOC_STM32F411RC)||\
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defined(SOC_STM32F411VC)||\
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defined(SOC_STM32F411CE)||\
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defined(SOC_STM32F411RE)||\
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defined(SOC_STM32F411VE)
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//#define STM32F411xE
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#define STM32_SRAM_SIZE 128
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#elif \
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defined(SOC_STM32F446MC)||\
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defined(SOC_STM32F446ME)||\
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defined(SOC_STM32F446RC)||\
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defined(SOC_STM32F446RE)||\
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defined(SOC_STM32F446VC)||\
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defined(SOC_STM32F446VE)||\
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defined(SOC_STM32F446ZC)||\
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defined(SOC_STM32F446ZE)
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//#define STM32F446xx
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#define STM32_SRAM_SIZE 128
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#elif \
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defined(SOC_STM32F469AI)||\
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defined(SOC_STM32F469II)||\
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defined(SOC_STM32F469BI)||\
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defined(SOC_STM32F469NI)||\
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defined(SOC_STM32F469AG)||\
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defined(SOC_STM32F469IG)||\
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defined(SOC_STM32F469BG)||\
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defined(SOC_STM32F469NG)||\
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defined(SOC_STM32F469AE)||\
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defined(SOC_STM32F469IE)||\
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defined(SOC_STM32F469BE)||\
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defined(SOC_STM32F469NE)
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//#define STM32F469xx
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#define STM32_SRAM_SIZE 384-64
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#elif \
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defined(SOC_STM32F479AI)||\
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defined(SOC_STM32F479II)||\
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defined(SOC_STM32F479BI)||\
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defined(SOC_STM32F479NI)||\
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defined(SOC_STM32F479AG)||\
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defined(SOC_STM32F479IG)||\
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defined(SOC_STM32F479BG)||\
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defined(SOC_STM32F479NG)
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//#define STM32F479xx
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#define STM32_SRAM_SIZE 384-64
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#elif \
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defined(SOC_STM32F412CEU)||\
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defined(SOC_STM32F412CGU)
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//#define STM32F412Cx
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#elif \
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defined(SOC_STM32F412ZET)||\
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defined(SOC_STM32F412ZGT)||\
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defined(SOC_STM32F412ZEJ)||\
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defined(SOC_STM32F412ZGJ)
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//#define STM32F412Zx
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#define STM32_SRAM_SIZE 256
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#elif \
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defined(SOC_STM32F412VET)||\
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defined(SOC_STM32F412VGT)||\
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defined(SOC_STM32F412VEH)||\
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defined(SOC_STM32F412VGH)
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//#define STM32F412Vx
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#define STM32_SRAM_SIZE 256
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#elif \
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defined(SOC_STM32F412RET)||\
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defined(SOC_STM32F412RGT)||\
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defined(SOC_STM32F412REY)||\
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defined(SOC_STM32F412RGY)
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//#define STM32F412Rx
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#define STM32_SRAM_SIZE 256
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#elif \
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defined(SOC_STM32F413CH)||\
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defined(SOC_STM32F413MH)||\
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defined(SOC_STM32F413RH)||\
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defined(SOC_STM32F413VH)||\
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defined(SOC_STM32F413ZH)||\
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defined(SOC_STM32F413CG)||\
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defined(SOC_STM32F413MG)||\
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defined(SOC_STM32F413RG)||\
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defined(SOC_STM32F413VG)||\
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defined(SOC_STM32F413ZG)
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//#define STM32F413xx
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#define STM32_SRAM_SIZE 320
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#elif \
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defined(SOC_STM32F423CH)||\
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defined(SOC_STM32F423RH)||\
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defined(SOC_STM32F423VH)||\
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defined(SOC_STM32F423ZH)
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//#define STM32F423xx
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#define STM32_SRAM_SIZE 320
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#endif
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN ((void *)&__bss_end)
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#endif
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#define HEAP_END (0x20000000 + STM32_SRAM_SIZE*1024)
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#endif
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extern void rt_hw_board_init(void);
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// <<< Use Configuration Wizard in Context Menu >>>
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