141 lines
4.5 KiB
C
141 lines
4.5 KiB
C
/*
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* File : mmcsd_card.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-07-25 weety first version
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*/
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#ifndef __MMCSD_CARD_H__
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#define __MMCSD_CARD_H__
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#include "mmcsd_host.h"
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#include "sdio.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SD_SCR_BUS_WIDTH_1 (1 << 0)
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#define SD_SCR_BUS_WIDTH_4 (1 << 2)
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struct rt_mmcsd_cid {
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rt_uint8_t mid; /* ManufacturerID */
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rt_uint8_t prv; /* Product Revision */
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rt_uint16_t oid; /* OEM/Application ID */
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rt_uint32_t psn; /* Product Serial Number */
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rt_uint8_t pnm[5]; /* Product Name */
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rt_uint8_t reserved1;/* reserved */
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rt_uint16_t mdt; /* Manufacturing Date */
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rt_uint8_t crc; /* CID CRC */
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rt_uint8_t reserved2;/* not used, always 1 */
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};
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struct rt_mmcsd_csd {
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rt_uint8_t csd_structure; /* CSD register version */
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rt_uint8_t taac;
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rt_uint8_t nsac;
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rt_uint8_t tran_speed; /* max data transfer rate */
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rt_uint16_t card_cmd_class; /* card command classes */
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rt_uint8_t rd_blk_len; /* max read data block length */
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rt_uint8_t rd_blk_part;
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rt_uint8_t wr_blk_misalign;
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rt_uint8_t rd_blk_misalign;
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rt_uint8_t dsr_imp; /* DSR implemented */
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rt_uint8_t c_size_mult; /* CSD 1.0 , device size multiplier */
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rt_uint32_t c_size; /* device size */
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rt_uint8_t r2w_factor;
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rt_uint8_t wr_blk_len; /* max wtire data block length */
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rt_uint8_t wr_blk_partial;
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rt_uint8_t csd_crc;
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};
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struct rt_sd_scr {
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rt_uint8_t sd_version;
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rt_uint8_t sd_bus_widths;
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};
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struct rt_sdio_cccr {
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rt_uint8_t sdio_version;
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rt_uint8_t sd_version;
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rt_uint8_t direct_cmd:1, /* Card Supports Direct Commands during data transfer
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only SD mode, not used for SPI mode */
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multi_block:1, /* Card Supports Multi-Block */
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read_wait:1, /* Card Supports Read Wait
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only SD mode, not used for SPI mode */
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suspend_resume:1, /* Card supports Suspend/Resume
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only SD mode, not used for SPI mode */
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s4mi:1, /* generate interrupts during a 4-bit
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multi-block data transfer */
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e4mi:1, /* Enable the multi-block IRQ during
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4-bit transfer for the SDIO card */
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low_speed:1, /* Card is a Low-Speed card */
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low_speed_4:1; /* 4-bit support for Low-Speed cards */
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rt_uint8_t bus_width:1, /* Support SDIO bus width, 1:4bit, 0:1bit */
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cd_disable:1, /* Connect[0]/Disconnect[1] the 10K-90K ohm pull-up
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resistor on CD/DAT[3] (pin 1) of the card */
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power_ctrl:1, /* Support Master Power Control */
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high_speed:1; /* Support High-Speed */
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};
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struct rt_sdio_cis {
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rt_uint16_t manufacturer;
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rt_uint16_t product;
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rt_uint16_t func0_blk_size;
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rt_uint32_t max_tran_speed;
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};
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#define SDIO_MAX_FUNCTIONS 7
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struct rt_mmcsd_card {
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struct rt_mmcsd_host *host;
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rt_uint32_t rca; /* card addr */
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rt_uint32_t resp_cid[4]; /* card CID register */
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rt_uint32_t resp_csd[4]; /* card CSD register */
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rt_uint32_t resp_scr[2]; /* card SCR register */
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rt_uint16_t tacc_clks; /* data access time by ns */
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rt_uint32_t tacc_ns; /* data access time by clk cycles */
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rt_uint32_t max_data_rate; /* max data transfer rate */
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rt_uint32_t card_capacity; /* card capacity, unit:KB */
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rt_uint32_t card_blksize; /* card block size */
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rt_uint16_t card_type;
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#define CARD_TYPE_MMC 0 /* MMC card */
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#define CARD_TYPE_SD 1 /* SD card */
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#define CARD_TYPE_SDIO 2 /* SDIO card */
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#define CARD_TYPE_SDIO_COMBO 3 /* SD combo (IO+mem) card */
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rt_uint16_t flags;
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#define CARD_FLAG_HIGHSPEED (1 << 0) /* SDIO bus speed 50MHz */
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#define CARD_FLAG_SDHC (1 << 1) /* SDHC card */
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#define CARD_FLAG_SDXC (1 << 2) /* SDXC card */
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struct rt_sd_scr scr;
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struct rt_mmcsd_csd csd;
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rt_uint32_t hs_max_data_rate; /* max data transfer rate in high speed mode */
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rt_uint8_t sdio_function_num; /* totol number of SDIO functions */
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struct rt_sdio_cccr cccr; /* common card info */
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struct rt_sdio_cis cis; /* common tuple info */
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struct rt_sdio_function *sdio_function[SDIO_MAX_FUNCTIONS + 1]; /* SDIO functions (devices) */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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