1298 lines
38 KiB
ArmAsm
1298 lines
38 KiB
ArmAsm
/*******************************************************************************
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* (c) Copyright 2012-2015 Microsemi SoC Products Group. All rights reserved.
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*
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* @file startup_m2sxxx.S
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* @author Microsemi SoC Products Group
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* @brief SmartFusion2 vector table and startup code for CodeSourcery G++.
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*
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* SVN $Revision: 7424 $
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* SVN $Date: 2015-05-19 21:16:09 +0530 (Tue, 19 May 2015) $
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*/
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.syntax unified
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.cpu cortex-m3
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.thumb
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/* #define UNIT_TEST_FILL_MEMORY only uncommented if carring out unit test */
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/*==============================================================================
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* Vector table
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*/
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.global g_pfnVectors
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.section .isr_vector,"ax",%progbits /* added "x" so appears in .lst file even though not executable code- to help in debug process */
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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.word WdogWakeup_IRQHandler
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.word RTC_Wakeup_IRQHandler
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.word SPI0_IRQHandler
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.word SPI1_IRQHandler
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.word I2C0_IRQHandler
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.word I2C0_SMBAlert_IRQHandler
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.word I2C0_SMBus_IRQHandler
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.word I2C1_IRQHandler
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.word I2C1_SMBAlert_IRQHandler
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.word I2C1_SMBus_IRQHandler
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.word UART0_IRQHandler
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.word UART1_IRQHandler
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.word EthernetMAC_IRQHandler
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.word DMA_IRQHandler
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.word Timer1_IRQHandler
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.word Timer2_IRQHandler
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.word CAN_IRQHandler
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.word ENVM0_IRQHandler
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.word ENVM1_IRQHandler
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.word ComBlk_IRQHandler
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.word USB_IRQHandler
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.word USB_DMA_IRQHandler
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.word PLL_Lock_IRQHandler
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.word PLL_LockLost_IRQHandler
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.word CommSwitchError_IRQHandler
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.word CacheError_IRQHandler
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.word DDR_IRQHandler
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.word HPDMA_Complete_IRQHandler
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.word HPDMA_Error_IRQHandler
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.word ECC_Error_IRQHandler
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.word MDDR_IOCalib_IRQHandler
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.word FAB_PLL_Lock_IRQHandler
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.word FAB_PLL_LockLost_IRQHandler
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.word FIC64_IRQHandler
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.word FabricIrq0_IRQHandler
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.word FabricIrq1_IRQHandler
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.word FabricIrq2_IRQHandler
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.word FabricIrq3_IRQHandler
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.word FabricIrq4_IRQHandler
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.word FabricIrq5_IRQHandler
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.word FabricIrq6_IRQHandler
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.word FabricIrq7_IRQHandler
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.word FabricIrq8_IRQHandler
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.word FabricIrq9_IRQHandler
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.word FabricIrq10_IRQHandler
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.word FabricIrq11_IRQHandler
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.word FabricIrq12_IRQHandler
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.word FabricIrq13_IRQHandler
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.word FabricIrq14_IRQHandler
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.word FabricIrq15_IRQHandler
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.word GPIO0_IRQHandler
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.word GPIO1_IRQHandler
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.word GPIO2_IRQHandler
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.word GPIO3_IRQHandler
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.word GPIO4_IRQHandler
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.word GPIO5_IRQHandler
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.word GPIO6_IRQHandler
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.word GPIO7_IRQHandler
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.word GPIO8_IRQHandler
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.word GPIO9_IRQHandler
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.word GPIO10_IRQHandler
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.word GPIO11_IRQHandler
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.word GPIO12_IRQHandler
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.word GPIO13_IRQHandler
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.word GPIO14_IRQHandler
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.word GPIO15_IRQHandler
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.word GPIO16_IRQHandler
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.word GPIO17_IRQHandler
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.word GPIO18_IRQHandler
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.word GPIO19_IRQHandler
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.word GPIO20_IRQHandler
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.word GPIO21_IRQHandler
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.word GPIO22_IRQHandler
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.word GPIO23_IRQHandler
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.word GPIO24_IRQHandler
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.word GPIO25_IRQHandler
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.word GPIO26_IRQHandler
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.word GPIO27_IRQHandler
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.word GPIO28_IRQHandler
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.word GPIO29_IRQHandler
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.word GPIO30_IRQHandler
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.word GPIO31_IRQHandler
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.word 0
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.word 0
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/*==============================================================================
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* Reset_Handler
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* Register r11 is used to keep track of whether we need to initialize RAMs
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* because ECC/ SECDED is enabled.
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*/
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.global Reset_Handler
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.section .boot_code,"ax",%progbits
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.type Reset_Handler, %function
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Reset_Handler:
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_start:
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/*------------------------------------------------------------------------------
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* Initialize stack RAM content to initialize the error detection and correction
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* (EDAC). This is done if EDAC is enabled for the eSRAM blocks or the
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* ECC/SECDED is enabled for the MDDR.
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* Register r11 is used to keep track of the RAM intialization decision outcome
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* for later use for heap RAM initialization at the end of the startup code.
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* Please note that the stack has to be located in eSRAM at this point and
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* cannot be located in MDDR since MDDR is not available at this point.
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* The bits of the content of register r11 have the following meaning:
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* reg11[0]: eSRAM EDAC enabled
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* reg11[1]: MDDR ECC/SECDED enabled
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*/
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mov r11, #0
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ldr r0, SF2_MDDR_MODE_CR
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ldr r0, [r0]
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ldr r1, SF2_EDAC_CR
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ldr r1, [r1]
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and r1, r1, #3
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and r0, r0, #0x1C
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cmp r0, #0x14
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bne check_esram_edac
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orr r11, r11, #2
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check_esram_edac:
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cmp r1, #0
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beq check_stack_init
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orr r11, r11, #1
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check_stack_init:
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cmp r11, #0
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beq system_init
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clear_stack:
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ldr r0, = __stack_start__
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ldr r1, =_estack
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ldr r2, RAM_INIT_PATTERN
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bl fill_memory /* ; fill_memory takes r0 - r2 as arguments uses r4, r5, r6, r7, r8, r9, and does not preserve contents */
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/*------------------------------------------------------------------------------
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* Call CMSIS system init function.
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*/
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system_init:
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ldr r0, =SystemInit
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blx r0
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/*------------------------------------------------------------------------------
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* Modify MDDR configuration if ECC/SECDED is enabled for MDDR.
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* Enable write combining on MDDR bridge, disable non-bufferable regions.
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*/
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and r10, r11, 0x2
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cmp r10, #0
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beq remap_memory
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ldr r0, SF2_DDRB_NB_SIZE
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ldr r1, SF2_DDRB_CR
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ldr r2, [r0]
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ldr r3, [r1]
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push {r0, r1, r2, r3}
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mov r2, #0
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mov r3, #0xFF
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str r2, [r0]
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str r3, [r1]
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/*------------------------------------------------------------------------------
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* Perform memory remapping based on the value of __smartfusion2_memory_remap
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* set in the linker script.
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*/
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remap_memory:
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ldr r0, =__smartfusion2_memory_remap
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ldr r2, =0
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ldr r3, =1
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cmp r0, #2
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bne check_esram_remap
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/*
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* Remap external RAM to address 0x00000000
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*/
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ldr r1, SF2_ESRAM_CR
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str r2, [r1]
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ldr r1, SF2_ENVM_REMAP_CR
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str r2, [r1]
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ldr r1, SF2_DDR_CR
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str r3, [r1]
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check_esram_remap:
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cmp r0, #1
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bne check_mirrored_nvm
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/*
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* Remap internal eSRAM to address 0x00000000
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*/
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ldr r1, SF2_DDR_CR
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str r2, [r1]
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ldr r1, SF2_ENVM_REMAP_CR
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str r2, [r1]
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ldr r1, SF2_ESRAM_CR
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str r3, [r1]
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/*------------------------------------------------------------------------------
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* Check if the executable is built for NVM LMA mirrored to VMA address.
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* This is done for debugging executables running out of eNVM with SoftConsole.
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* The .text section should not be copied in this case since both the LMA and
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* VMA point at the eNVM despite the LMA and VMa having different values.
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*/
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check_mirrored_nvm:
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ldr r0, =__mirrored_nvm
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cmp r0, #0
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bne copy_data
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/*------------------------------------------------------------------------------
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* Copy vector table.
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*/
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ldr r0, =__vector_table_load
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ldr r1, =__vector_table_start
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ldr r2, =_evector_table
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bl block_copy
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/*------------------------------------------------------------------------------
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* Copy code section.
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*/
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copy_text:
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ldr r0, =__text_load
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ldr r1, =__text_start
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ldr r2, =_etext
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bl block_copy
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/*------------------------------------------------------------------------------
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* Copy data section.
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*/
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copy_data:
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ldr r0, =__data_load
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ldr r1, =__data_start
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ldr r2, =_edata
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bl block_copy
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/*------------------------------------------------------------------------------
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* Clear .bss
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*/
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clear_bss:
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ldr r0, =__bss_start__
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ldr r1, =__bss_end__
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ldr r2, RAM_INIT_PATTERN
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bl fill_memory /* ; fill_memory takes r0 - r2 as arguments uses r4, r5, r6, r7, r8, r9, and does not preserve contents */
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#ifdef UNIT_TEST_FILL_MEMORY
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bl unit_test_fill_memory
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#endif
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/*------------------------------------------------------------------------------
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* Initialize heap RAM content to initialize the error detection and correction
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* (EDAC). We use the decision made earlier in the startup code of whether or
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* not the stack RAM should be initialized. This decision is held in register
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* r11. A non-zero value indicates that the RAM content should be initialized.
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*/
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clear_heap:
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cmp r11, #0
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beq call_glob_ctor
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ldr r0, =__heap_start__
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ldr r1, =_eheap
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ldr r2, HEAP_INIT_PATTERN
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bl fill_memory /* ; fill_memory takes r0 - r2 as arguments uses r4, r5, r6, r7, r8, r9, and does not preserve contents */
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/*------------------------------------------------------------------------------
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* Restore MDDR configuration.
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*/
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and r10, r11, 0x2
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cmp r10, #0
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beq call_glob_ctor
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pop {r0, r1, r2, r3}
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str r2, [r0]
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str r3, [r1]
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/*------------------------------------------------------------------------------
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* Call global constructors
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*/
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/*
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* Align to word and use 32-bits LDR instruction to ensure the ADD instruction
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* taking PC as argument is aligned on a word boundary.
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*/
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.align 4
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call_glob_ctor:
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ldr.w r0, =__libc_init_array
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add lr, pc, #3
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bx r0
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/*------------------------------------------------------------------------------
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* branch to main.
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*/
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branch_to_main:
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mov r0, #0 /* ; no arguments */
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mov r1, #0 /* ; no argv either */
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ldr pc, =main
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ExitLoop:
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B ExitLoop
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/*------------------------------------------------------------------------------
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* block copy.
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*
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* r0: source address
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* r1: target address
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* r2: end target address
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*
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* note: Most efficient if memory aligned. Linker ALIGN(16) command
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* should be used as per example linker scripts.
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* Note 1: If the memory address in r0 or r1, byte copy routine is used
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* Note 2: If r1 < r2, will loop indefinetley to highlight linker issue.
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*/
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block_copy:
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push {r3, r4, r5, r6, r7, r8, lr}
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cmp r0, r1
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beq block_copy_exit /* ; Exit early if source and destination the same */
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subs.w r2, r2, r1 /* ; Calculate number of bytes to move */
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bpl block_copy_address_ok /* ; check (end target address) > (target address) => continue */
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b . /* ; halt as critical error- memory map not OK- make it easy to catch in debugger */
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block_copy_address_ok:
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/* ; detect if source or target memory addresses unaligned. If so use byte copy routine */
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orr.w r3, r0, r1
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ands.w r3, r3, #3
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beq block_copy_continue
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block_copy_byte_copy:
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bl block_copy_byte
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b block_copy_exit
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block_copy_continue:
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mov r3, #0
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mov r8,r2 /* ; Save copy of byte count */
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asrs r2,r2, #4 /* ; Div by 16 to get number of chunks to move */
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beq block_copy_byte_copy /* ; need to use byte copy if less than 16 bytes */
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block_copy_loop:
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cmp r2, r3
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itt ne
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ldmne r0!, {r4, r5, r6, r7}
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stmne r1!, {r4, r5, r6, r7}
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add.w r3, r3, #1 /* ; use Thumb2- make sure condition code reg. not updated */
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bne block_copy_loop
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/* ; copy spare bytes at the end if any */
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and r8, #15 /* ; get spare bytes --check can you do an ands? */
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cmp r8, #0 /* ; no spare bytes at end- end now */
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beq block_copy_exit
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copy_spare_bytes: /* ; From above, R0 contains source address, R1 contains destination address */
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ldrb r4, [r0]
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strb r4, [r1]
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add r0, #1
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add r1, #1
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subs r8, r8, #1
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bne copy_spare_bytes
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block_copy_exit:
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pop {r3, r4, r5, r6, r7, r8, pc}
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/*
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* block_copy_byte: used if memory not aligned
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* r0: source address
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* r1: target address
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* r2: number of bytes
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*/
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block_copy_byte:
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push {r3, lr}
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mov r3, #0
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block_copy_byte_loop: /* ; From above, R0 contains source address, R1 contains destination address */
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ldrb r3, [r0]
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strb r3, [r1]
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add r0, #1
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add r1, #1
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subs r2, r2, #1
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bne block_copy_byte_loop
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pop {r3, pc}
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/*;------------------------------------------------------------------------------
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; * fill_memory.
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; * @brief Fills memory with Pattern contained in r2
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; * This routine uses the stmne instruction to copy 4 words at a time which is very efficient
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; * The instruction can only write to word aligned memory, hence the code at the start and end of this routine
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; * to handle possible unaligned bytes at start and end.
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; *
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; * @param param1 r0: start address
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; * @param param2 r1: end address
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; * @param param3 r2: FILL PATTETN
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; *
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; * @note note: Most efficient if memory aligned. Linker ALIGN(4) command
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; * should be used as per example linker scripts
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; * Stack is not used in this routine
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; * register contents r4, r5, r6, r7, r8, r9, will are used and will be returned undefined
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; * @return none - Used Registers are not preserved
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; */
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fill_memory:
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/* ;push {r4, r5, r6, r7, r8, r9, lr} We will not use stack as may be not available */
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cmp r0, r1
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beq fill_memory_exit /* ; Exit early if source and destination the same */
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/* ; copy non-aligned bytes at the start */
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and.w r6, r0, #3 /* ; see if non-alaigned bytes at the start */
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cmp r6, #0
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beq fill_memory_end_start /* ; no spare bytes at start, continue */
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mov r5, #4
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sub.w r4, r5, r6 /* ; now have number of non-aligned bytes in r4 */
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mov r7, #8
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mul r8, r7, r6 /* ; calculate number of shifts required to initalise pattern for non-aligned bytes */
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mov r9, r2 /* ; copy pattern */
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ror r9, r9, r8 /* ; Rotate right to keep pattern consistent */
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fill_memory_spare_bytes_start: /* ; From above, R0 contains source address, R1 contains destination address */
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cmp r4, #0 /* ; no spare bytes at end- end now */
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beq fill_memory_end_start
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strb r9, [r0] /* ; fill byte */
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ror.w r9, r9, r7 /* ; Rotate right by one byte for the next time, to keep pattern consistent */
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add r0, r0, #1 /* ; add one to address */
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subs r4, r4, #1 /* ; subtract one from byte count 1 */
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b fill_memory_spare_bytes_start
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fill_memory_end_start:
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mov r6, #0
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mov r7, r1 /* ; save end address */
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subs r1, r1, r0 /* ; Calculate number of bytes to fill */
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mov r8,r1 /* ; Save copy of byte count */
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asrs r1,r1, #4 /* ; Div by 16 to get number of chunks to move */
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mov r9, r2 /* ; copy pattern */
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mov r4, r2 /* ; copy pattern */
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mov r5, r2 /* ; copy pattern */
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cmp r1, r6 /* ; compare to see if all chunks copied */
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beq fill_memory_spare_bytes_end
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fill_memory_loop:
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it ne
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stmne r0!, {r2, r4, r5, r9} /* ; copy pattern- note: stmne instruction must me word aligned (address in r0) */
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add.w r6, r6, #1 /* ; use Thumb2- make sure condition code reg. not updated */
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cmp r1, r6 /* ; compare to see if all chunks copied */
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bne fill_memory_loop
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fill_memory_spare_bytes_end: /* ; copy spare bytes at the end if any */
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and.w r8, r8, #15 /* ; get spare bytes --check can you do an ands? */
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fill_memory_spare_end_loop: /* ; From above, R0 contains source address, R1 contains destination address */
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cmp r8, #0 /* ; no spare bytes at end- end now */
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beq fill_memory_exit
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strb r2, [r0]
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ror.w r2, r2, #8 /* ; Rotate right by one byte for the next time, to keep pattern consistent */
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add r0, r0, #1 /* ; add one to address */
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subs r8, r8, #1 /* ; subtract one from byte count 1 */
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b fill_memory_spare_end_loop
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fill_memory_exit:
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bx lr /*; We will not use pop as stack may be not available */
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/*------------------------------------------------------------------------------
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* unit_test_fill_memory
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* calls fills_memory function with various paramaters
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*
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* r0: start address
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* r1: end address
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* r2: FILL PATTETN
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*
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* Debugger used to check filled memeory is as expected.
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* Note: Last instruction in this routine deliberatly halts code to prevent accidentle enabeling in
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* release code.
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*/
|
|
#ifdef UNIT_TEST_FILL_MEMORY
|
|
MEM_TEST_PATTERN: .word 0x12345678
|
|
unit_test_fill_memory:
|
|
push {r0, r1, r2, lr}
|
|
ldr r0, = 0x20000100
|
|
ldr r1, = 0x20000200
|
|
ldr r2, MEM_TEST_PATTERN
|
|
bl fill_memory /* ; fill_memory takes r0 - r2 as arguments */
|
|
ldr r0, = 0x20000300 /* ; source address */
|
|
ldr r1, = 0x20000400 /* ; dest address */
|
|
ldr r2, = 0x200004FF /* ; end address */
|
|
bl block_copy /* ; copy above */
|
|
/* second test */
|
|
ldr r0, = 0x20003300
|
|
ldr r1, = 0x20003403
|
|
ldr r2, MEM_TEST_PATTERN
|
|
bl fill_memory
|
|
ldr r0, = 0x20003300
|
|
ldr r1, = 0x20003500
|
|
ldr r2, = 0x20003603
|
|
bl block_copy
|
|
/* third test */
|
|
ldr r0, = 0x20000702
|
|
ldr r1, = 0x20000803
|
|
ldr r2, MEM_TEST_PATTERN
|
|
bl fill_memory /* ; fill_memory takes r0 - r2 as arguments */
|
|
ldr r0, = 0x20000702
|
|
ldr r1, = 0x20000902
|
|
ldr r2, = 0x20000A03
|
|
bl block_copy
|
|
/* fourth test */
|
|
ldr r0, = 0x20000B01
|
|
ldr r1, = 0x20000C03
|
|
ldr r2, MEM_TEST_PATTERN
|
|
bl fill_memory /* ; fill_memory takes r0 - r2 as arguments */
|
|
ldr r0, = 0x20000B01
|
|
ldr r1, = 0x20000D01
|
|
ldr r2, = 0x20000E03
|
|
bl block_copy
|
|
/* fith test */
|
|
ldr r0, = 0x20002D01
|
|
ldr r1, = 0x20002E01
|
|
ldr r2, MEM_TEST_PATTERN
|
|
bl fill_memory /* ; fill_memory takes r0 - r2 as arguments */
|
|
ldr r0, = 0x20002D01
|
|
ldr r1, = 0x20002F01
|
|
ldr r2, = 0x20003001
|
|
bl block_copy
|
|
/* sixth test */
|
|
ldr r0, = 0x20001903
|
|
ldr r1, = 0x20001904
|
|
ldr r2, MEM_TEST_PATTERN
|
|
bl fill_memory /* ; fill_memory takes r0 - r2 as arguments */
|
|
ldr r0, = 0x20001903
|
|
ldr r1, = 0x20001A03
|
|
ldr r2, = 0x20001A04
|
|
bl block_copy
|
|
/* ; final test, note: This one will cause a halt in copy function- as designed */
|
|
ldr r0, = 0x20001903
|
|
ldr r1, = 0x20001A03
|
|
ldr r2, = 0x20000A04 /* ; end address < start address */
|
|
bl block_copy
|
|
unit_test_fill_memory_debug: /* ; delibrately wait here, this function only to be used when carrying out test */
|
|
b . /* ; stop debugger here and verify memory as expected in debugger */
|
|
pop {r0, r1, r2, pc}
|
|
#endif
|
|
/*==============================================================================
|
|
* NMI_Handler
|
|
*/
|
|
.weak NMI_Handler
|
|
.type NMI_Handler, %function
|
|
NMI_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* HardFault_Handler
|
|
*/
|
|
.weak HardFault_Handler
|
|
.type HardFault_Handler, %function
|
|
HardFault_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* MemManage_Handler
|
|
*/
|
|
.weak MemManage_Handler
|
|
.type MemManage_Handler, %function
|
|
MemManage_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* BusFault_Handler
|
|
*/
|
|
.weak BusFault_Handler
|
|
.type BusFault_Handler, %function
|
|
BusFault_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* UsageFault_Handler
|
|
*/
|
|
.weak UsageFault_Handler
|
|
.type UsageFault_Handler, %function
|
|
UsageFault_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* SVC_Handler
|
|
*/
|
|
.weak SVC_Handler
|
|
.type SVC_Handler, %function
|
|
SVC_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* DebugMon_Handler
|
|
*/
|
|
.weak DebugMon_Handler
|
|
.type DebugMon_Handler, %function
|
|
DebugMon_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* PendSV_Handler
|
|
*/
|
|
.weak PendSV_Handler
|
|
.type PendSV_Handler, %function
|
|
PendSV_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* SysTick_Handler
|
|
*/
|
|
.weak SysTick_Handler
|
|
.type SysTick_Handler, %function
|
|
SysTick_Handler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* WdogWakeup_IRQHandler
|
|
*/
|
|
.weak WdogWakeup_IRQHandler
|
|
.type WdogWakeup_IRQHandler, %function
|
|
WdogWakeup_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* RTC_Wakeup_IRQHandler
|
|
*/
|
|
.weak RTC_Wakeup_IRQHandler
|
|
.type RTC_Wakeup_IRQHandler, %function
|
|
RTC_Wakeup_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* SPI0_IRQHandler
|
|
*/
|
|
.weak SPI0_IRQHandler
|
|
.type SPI0_IRQHandler, %function
|
|
SPI0_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* SPI1_IRQHandler
|
|
*/
|
|
.weak SPI1_IRQHandler
|
|
.type SPI1_IRQHandler, %function
|
|
SPI1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* I2C0_IRQHandler
|
|
*/
|
|
.weak I2C0_IRQHandler
|
|
.type I2C0_IRQHandler, %function
|
|
I2C0_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* I2C0_SMBAlert_IRQHandler
|
|
*/
|
|
.weak I2C0_SMBAlert_IRQHandler
|
|
.type I2C0_SMBAlert_IRQHandler, %function
|
|
I2C0_SMBAlert_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* I2C0_SMBus_IRQHandler
|
|
*/
|
|
.weak I2C0_SMBus_IRQHandler
|
|
.type I2C0_SMBus_IRQHandler, %function
|
|
I2C0_SMBus_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* I2C1_IRQHandler
|
|
*/
|
|
.weak I2C1_IRQHandler
|
|
.type I2C1_IRQHandler, %function
|
|
I2C1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* I2C1_SMBAlert_IRQHandler
|
|
*/
|
|
.weak I2C1_SMBAlert_IRQHandler
|
|
.type I2C1_SMBAlert_IRQHandler, %function
|
|
I2C1_SMBAlert_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* I2C1_SMBus_IRQHandler
|
|
*/
|
|
.weak I2C1_SMBus_IRQHandler
|
|
.type I2C1_SMBus_IRQHandler, %function
|
|
I2C1_SMBus_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* UART0_IRQHandler
|
|
*/
|
|
.weak UART0_IRQHandler
|
|
.type UART0_IRQHandler, %function
|
|
UART0_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* UART1_IRQHandler
|
|
*/
|
|
.weak UART1_IRQHandler
|
|
.type UART1_IRQHandler, %function
|
|
UART1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* EthernetMAC_IRQHandler
|
|
*/
|
|
.weak EthernetMAC_IRQHandler
|
|
.type EthernetMAC_IRQHandler, %function
|
|
EthernetMAC_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* DMA_IRQHandler
|
|
*/
|
|
.weak DMA_IRQHandler
|
|
.type DMA_IRQHandler, %function
|
|
DMA_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* Timer1_IRQHandler
|
|
*/
|
|
.weak Timer1_IRQHandler
|
|
.type Timer1_IRQHandler, %function
|
|
Timer1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* Timer2_IRQHandler
|
|
*/
|
|
.weak Timer2_IRQHandler
|
|
.type Timer2_IRQHandler, %function
|
|
Timer2_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* CAN_IRQHandler
|
|
*/
|
|
.weak CAN_IRQHandler
|
|
.type CAN_IRQHandler, %function
|
|
CAN_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* ENVM0_IRQHandler
|
|
*/
|
|
.weak ENVM0_IRQHandler
|
|
.type ENVM0_IRQHandler, %function
|
|
ENVM0_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* ENVM1_IRQHandler
|
|
*/
|
|
.weak ENVM1_IRQHandler
|
|
.type ENVM1_IRQHandler, %function
|
|
ENVM1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* ComBlk_IRQHandler
|
|
*/
|
|
.weak ComBlk_IRQHandler
|
|
.type ComBlk_IRQHandler, %function
|
|
ComBlk_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* USB_IRQHandler
|
|
*/
|
|
.weak USB_IRQHandler
|
|
.type USB_IRQHandler, %function
|
|
USB_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* USB_DMA_IRQHandler
|
|
*/
|
|
.weak USB_DMA_IRQHandler
|
|
.type USB_DMA_IRQHandler, %function
|
|
USB_DMA_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* PLL_Lock_IRQHandler
|
|
*/
|
|
.weak PLL_Lock_IRQHandler
|
|
.type PLL_Lock_IRQHandler, %function
|
|
PLL_Lock_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* PLL_LockLost_IRQHandler
|
|
*/
|
|
.weak PLL_LockLost_IRQHandler
|
|
.type PLL_LockLost_IRQHandler, %function
|
|
PLL_LockLost_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* CommSwitchError_IRQHandler
|
|
*/
|
|
.weak CommSwitchError_IRQHandler
|
|
.type CommSwitchError_IRQHandler, %function
|
|
CommSwitchError_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* CacheError_IRQHandler
|
|
*/
|
|
.weak CacheError_IRQHandler
|
|
.type CacheError_IRQHandler, %function
|
|
CacheError_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* DDR_IRQHandler
|
|
*/
|
|
.weak DDR_IRQHandler
|
|
.type DDR_IRQHandler, %function
|
|
DDR_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* HPDMA_Complete_IRQHandler
|
|
*/
|
|
.weak HPDMA_Complete_IRQHandler
|
|
.type HPDMA_Complete_IRQHandler, %function
|
|
HPDMA_Complete_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* HPDMA_Error_IRQHandler
|
|
*/
|
|
.weak HPDMA_Error_IRQHandler
|
|
.type HPDMA_Error_IRQHandler, %function
|
|
HPDMA_Error_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* ECC_Error_IRQHandler
|
|
*/
|
|
.weak ECC_Error_IRQHandler
|
|
.type ECC_Error_IRQHandler, %function
|
|
ECC_Error_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* MDDR_IOCalib_IRQHandler
|
|
*/
|
|
.weak MDDR_IOCalib_IRQHandler
|
|
.type MDDR_IOCalib_IRQHandler, %function
|
|
MDDR_IOCalib_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FAB_PLL_Lock_IRQHandler
|
|
*/
|
|
.weak FAB_PLL_Lock_IRQHandler
|
|
.type FAB_PLL_Lock_IRQHandler, %function
|
|
FAB_PLL_Lock_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FAB_PLL_LockLost_IRQHandler
|
|
*/
|
|
.weak FAB_PLL_LockLost_IRQHandler
|
|
.type FAB_PLL_LockLost_IRQHandler, %function
|
|
FAB_PLL_LockLost_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FIC64_IRQHandler
|
|
*/
|
|
.weak FIC64_IRQHandler
|
|
.type FIC64_IRQHandler, %function
|
|
FIC64_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq0_IRQHandler
|
|
*/
|
|
.weak FabricIrq0_IRQHandler
|
|
.type FabricIrq0_IRQHandler, %function
|
|
FabricIrq0_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq1_IRQHandler
|
|
*/
|
|
.weak FabricIrq1_IRQHandler
|
|
.type FabricIrq1_IRQHandler, %function
|
|
FabricIrq1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq2_IRQHandler
|
|
*/
|
|
.weak FabricIrq2_IRQHandler
|
|
.type FabricIrq2_IRQHandler, %function
|
|
FabricIrq2_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq3_IRQHandler
|
|
*/
|
|
.weak FabricIrq3_IRQHandler
|
|
.type FabricIrq3_IRQHandler, %function
|
|
FabricIrq3_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq4_IRQHandler
|
|
*/
|
|
.weak FabricIrq4_IRQHandler
|
|
.type FabricIrq4_IRQHandler, %function
|
|
FabricIrq4_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq5_IRQHandler
|
|
*/
|
|
.weak FabricIrq5_IRQHandler
|
|
.type FabricIrq5_IRQHandler, %function
|
|
FabricIrq5_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq6_IRQHandler
|
|
*/
|
|
.weak FabricIrq6_IRQHandler
|
|
.type FabricIrq6_IRQHandler, %function
|
|
FabricIrq6_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq7_IRQHandler
|
|
*/
|
|
.weak FabricIrq7_IRQHandler
|
|
.type FabricIrq7_IRQHandler, %function
|
|
FabricIrq7_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq8_IRQHandler
|
|
*/
|
|
.weak FabricIrq8_IRQHandler
|
|
.type FabricIrq8_IRQHandler, %function
|
|
FabricIrq8_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq9_IRQHandler
|
|
*/
|
|
.weak FabricIrq9_IRQHandler
|
|
.type FabricIrq9_IRQHandler, %function
|
|
FabricIrq9_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq10_IRQHandler
|
|
*/
|
|
.weak FabricIrq10_IRQHandler
|
|
.type FabricIrq10_IRQHandler, %function
|
|
FabricIrq10_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq11_IRQHandler
|
|
*/
|
|
.weak FabricIrq11_IRQHandler
|
|
.type FabricIrq11_IRQHandler, %function
|
|
FabricIrq11_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq12_IRQHandler
|
|
*/
|
|
.weak FabricIrq12_IRQHandler
|
|
.type FabricIrq12_IRQHandler, %function
|
|
FabricIrq12_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq13_IRQHandler
|
|
*/
|
|
.weak FabricIrq13_IRQHandler
|
|
.type FabricIrq13_IRQHandler, %function
|
|
FabricIrq13_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq14_IRQHandler
|
|
*/
|
|
.weak FabricIrq14_IRQHandler
|
|
.type FabricIrq14_IRQHandler, %function
|
|
FabricIrq14_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* FabricIrq15_IRQHandler
|
|
*/
|
|
.weak FabricIrq15_IRQHandler
|
|
.type FabricIrq15_IRQHandler, %function
|
|
FabricIrq15_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO0_IRQHandler
|
|
*/
|
|
.weak GPIO0_IRQHandler
|
|
.type GPIO0_IRQHandler, %function
|
|
GPIO0_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO1_IRQHandler
|
|
*/
|
|
.weak GPIO1_IRQHandler
|
|
.type GPIO1_IRQHandler, %function
|
|
GPIO1_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO2_IRQHandler
|
|
*/
|
|
.weak GPIO2_IRQHandler
|
|
.type GPIO2_IRQHandler, %function
|
|
GPIO2_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO3_IRQHandler
|
|
*/
|
|
.weak GPIO3_IRQHandler
|
|
.type GPIO3_IRQHandler, %function
|
|
GPIO3_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO4_IRQHandler
|
|
*/
|
|
.weak GPIO4_IRQHandler
|
|
.type GPIO4_IRQHandler, %function
|
|
GPIO4_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO5_IRQHandler
|
|
*/
|
|
.weak GPIO5_IRQHandler
|
|
.type GPIO5_IRQHandler, %function
|
|
GPIO5_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO6_IRQHandler
|
|
*/
|
|
.weak GPIO6_IRQHandler
|
|
.type GPIO6_IRQHandler, %function
|
|
GPIO6_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO7_IRQHandler
|
|
*/
|
|
.weak GPIO7_IRQHandler
|
|
.type GPIO7_IRQHandler, %function
|
|
GPIO7_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO8_IRQHandler
|
|
*/
|
|
.weak GPIO8_IRQHandler
|
|
.type GPIO8_IRQHandler, %function
|
|
GPIO8_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO9_IRQHandler
|
|
*/
|
|
.weak GPIO9_IRQHandler
|
|
.type GPIO9_IRQHandler, %function
|
|
GPIO9_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO10_IRQHandler
|
|
*/
|
|
.weak GPIO10_IRQHandler
|
|
.type GPIO10_IRQHandler, %function
|
|
GPIO10_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO11_IRQHandler
|
|
*/
|
|
.weak GPIO11_IRQHandler
|
|
.type GPIO11_IRQHandler, %function
|
|
GPIO11_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO12_IRQHandler
|
|
*/
|
|
.weak GPIO12_IRQHandler
|
|
.type GPIO12_IRQHandler, %function
|
|
GPIO12_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO13_IRQHandler
|
|
*/
|
|
.weak GPIO13_IRQHandler
|
|
.type GPIO13_IRQHandler, %function
|
|
GPIO13_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO14_IRQHandler
|
|
*/
|
|
.weak GPIO14_IRQHandler
|
|
.type GPIO14_IRQHandler, %function
|
|
GPIO14_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO15_IRQHandler
|
|
*/
|
|
.weak GPIO15_IRQHandler
|
|
.type GPIO15_IRQHandler, %function
|
|
GPIO15_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO16_IRQHandler
|
|
*/
|
|
.weak GPIO16_IRQHandler
|
|
.type GPIO16_IRQHandler, %function
|
|
GPIO16_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO17_IRQHandler
|
|
*/
|
|
.weak GPIO17_IRQHandler
|
|
.type GPIO17_IRQHandler, %function
|
|
GPIO17_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO18_IRQHandler
|
|
*/
|
|
.weak GPIO18_IRQHandler
|
|
.type GPIO18_IRQHandler, %function
|
|
GPIO18_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO19_IRQHandler
|
|
*/
|
|
.weak GPIO19_IRQHandler
|
|
.type GPIO19_IRQHandler, %function
|
|
GPIO19_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO20_IRQHandler
|
|
*/
|
|
.weak GPIO20_IRQHandler
|
|
.type GPIO20_IRQHandler, %function
|
|
GPIO20_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO21_IRQHandler
|
|
*/
|
|
.weak GPIO21_IRQHandler
|
|
.type GPIO21_IRQHandler, %function
|
|
GPIO21_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO22_IRQHandler
|
|
*/
|
|
.weak GPIO22_IRQHandler
|
|
.type GPIO22_IRQHandler, %function
|
|
GPIO22_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO23_IRQHandler
|
|
*/
|
|
.weak GPIO23_IRQHandler
|
|
.type GPIO23_IRQHandler, %function
|
|
GPIO23_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO24_IRQHandler
|
|
*/
|
|
.weak GPIO24_IRQHandler
|
|
.type GPIO24_IRQHandler, %function
|
|
GPIO24_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO25_IRQHandler
|
|
*/
|
|
.weak GPIO25_IRQHandler
|
|
.type GPIO25_IRQHandler, %function
|
|
GPIO25_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO26_IRQHandler
|
|
*/
|
|
.weak GPIO26_IRQHandler
|
|
.type GPIO26_IRQHandler, %function
|
|
GPIO26_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO27_IRQHandler
|
|
*/
|
|
.weak GPIO27_IRQHandler
|
|
.type GPIO27_IRQHandler, %function
|
|
GPIO27_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO28_IRQHandler
|
|
*/
|
|
.weak GPIO28_IRQHandler
|
|
.type GPIO28_IRQHandler, %function
|
|
GPIO28_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO29_IRQHandler
|
|
*/
|
|
.weak GPIO29_IRQHandler
|
|
.type GPIO29_IRQHandler, %function
|
|
GPIO29_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO30_IRQHandler
|
|
*/
|
|
.weak GPIO30_IRQHandler
|
|
.type GPIO30_IRQHandler, %function
|
|
GPIO30_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* GPIO31_IRQHandler
|
|
*/
|
|
.weak GPIO31_IRQHandler
|
|
.type GPIO31_IRQHandler, %function
|
|
GPIO31_IRQHandler:
|
|
B .
|
|
|
|
/*==============================================================================
|
|
* mscc_post_hw_cfg_init
|
|
*/
|
|
.weak mscc_post_hw_cfg_init
|
|
.type mscc_post_hw_cfg_init, %function
|
|
mscc_post_hw_cfg_init:
|
|
BX LR
|
|
|
|
/*==============================================================================
|
|
* Constants:
|
|
*/
|
|
RAM_INIT_PATTERN: .word 0x00000000
|
|
HEAP_INIT_PATTERN: .word 0xA2A2A2A2
|
|
SF2_ESRAM_CR: .word 0x40038000
|
|
SF2_DDR_CR: .word 0x40038008
|
|
SF2_ENVM_REMAP_CR: .word 0x40038010
|
|
SF2_DDRB_NB_SIZE: .word 0x40038030
|
|
SF2_DDRB_CR: .word 0x40038034
|
|
SF2_EDAC_CR: .word 0x40038038
|
|
SF2_MDDR_MODE_CR: .word 0x40020818
|
|
|
|
.end
|