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1a24ae06f3
* [DM/FEATURE] Support reset controller
Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
1. The consumer driver interface, which allows
peripheral drivers to request control over
their reset input signals
2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.
* [RESET/SIMPLE] Support simple reset
Currently this driver supports:
- Altera SoCFPGAs
- ASPEED BMC SoCs
- Bitmain BM1880 SoC
- Realtek SoCs
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- SiFive FU740 SoCs
- Sophgo SoCs
Signed-off-by: GuEe-GUI <2991707448@qq.com>
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-11-26 GuEe-GUI first version
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*/
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#ifndef __RESET_SIMPLE_H__
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#define __RESET_SIMPLE_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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struct reset_simple
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{
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struct rt_reset_controller parent;
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void *mmio_base;
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/*
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* If true, bits are cleared to assert the reset.
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* Otherwise, bits are set to assert the reset.
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*/
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rt_bool_t active_low;
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/*
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* If true, bits read back as cleared while the reset is asserted.
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* Otherwise, bits read back as set while the reset is asserted.
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*/
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rt_bool_t status_active_low;
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/*
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* Minimum delay in microseconds needed that needs to be
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* waited for between an assert and a deassert to reset the device.
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* If multiple consumers with different delay
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* requirements are connected to this controller, it must
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* be the largest minimum delay. 0 means that such a delay is
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* unknown and the reset operation is unsupported.
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*/
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rt_uint32_t reset_us;
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/* protect registers during read-modify-write cycles */
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struct rt_spinlock lock;
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};
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extern const struct rt_reset_control_ops reset_simple_ops;
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#endif /* __RESET_SIMPLE_H__ */
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