138 lines
3.5 KiB
C
138 lines
3.5 KiB
C
/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-06-03 hqfang the first version.
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*
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*/
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#include "drv_adc.h"
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#ifdef BSP_USING_ADC
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#if !defined(BSP_USING_ADC0) && !defined(BSP_USING_ADC1)
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#error "Please define at least one BSP_USING_ADCx"
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/* this driver can be disabled at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable ADC */
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#endif
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static struct gd32_adc_config adc_config[] =
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{
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#ifdef BSP_USING_ADC0
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{
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"adc0",
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ADC0,
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},
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#endif
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#ifdef BSP_USING_ADC1
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{
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"adc1",
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ADC1,
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},
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#endif
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};
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static struct gd32_adc adc_obj[sizeof(adc_config) / sizeof(adc_config[0])] = {0};
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static void gd32_adc_init(struct gd32_adc_config *config)
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{
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RT_ASSERT(config != RT_NULL);
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adc_deinit(config->adc_periph);
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ADC_CTL0(config->adc_periph) &= ~(ADC_CTL0_SYNCM);
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ADC_CTL0(config->adc_periph) |= ADC_MODE_FREE;
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ADC_CTL1(config->adc_periph) |= ADC_CTL1_TSVREN;
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adc_resolution_config(config->adc_periph, ADC_RESOLUTION_12B);
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/* ADC contineous function enable */
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adc_special_function_config(config->adc_periph, ADC_SCAN_MODE, ENABLE);
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/* ADC data alignment config */
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adc_data_alignment_config(config->adc_periph, ADC_DATAALIGN_RIGHT);
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/* ADC channel length config */
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adc_channel_length_config(config->adc_periph, ADC_REGULAR_CHANNEL, 1);
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adc_external_trigger_source_config(config->adc_periph, ADC_REGULAR_CHANNEL, ADC0_1_EXTTRIG_REGULAR_NONE);
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/* ADC enable */
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adc_external_trigger_config(config->adc_periph, ADC_REGULAR_CHANNEL, ENABLE);
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adc_enable(config->adc_periph);
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adc_calibration_enable(config->adc_periph);
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}
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static rt_err_t gd32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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if (channel > ADC_CHANNEL_17)
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{
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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static rt_err_t gd32_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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struct gd32_adc_config *config;
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RT_ASSERT(device != RT_NULL);
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if (channel > ADC_CHANNEL_17)
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{
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return -RT_EINVAL;
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}
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config = (struct gd32_adc_config *)(device->parent.user_data);
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if (channel > ADC_CHANNEL_15)
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{
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adc_regular_channel_config(config->adc_periph, 0, channel, ADC_SAMPLETIME_239POINT5);
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}
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else
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{
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adc_regular_channel_config(config->adc_periph, 0, channel, ADC_SAMPLETIME_55POINT5);
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}
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adc_software_trigger_enable(config->adc_periph, ADC_REGULAR_CHANNEL);
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while (SET != adc_flag_get(config->adc_periph, ADC_FLAG_EOC));
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adc_flag_clear(config->adc_periph, ADC_FLAG_EOC);
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*value = ADC_RDATA(config->adc_periph);
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return RT_EOK;
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}
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static struct rt_adc_ops gd32_adc_ops =
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{
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.enabled = gd32_adc_enabled,
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.convert = gd32_adc_convert,
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};
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int rt_hw_adc_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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#if defined(BSP_USING_ADC0)
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rcu_periph_clock_enable(RCU_ADC0);
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#endif
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#if defined(BSP_USING_ADC1)
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rcu_periph_clock_enable(RCU_ADC1);
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#endif
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rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);
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for (i = 0; i < sizeof(adc_obj) / sizeof(adc_obj[0]); i++)
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{
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adc_obj[i].config = &adc_config[i];
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gd32_adc_init(&adc_config[i]);
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rt_hw_adc_register(&adc_obj[i].adc_device, \
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adc_obj[i].config->name, &gd32_adc_ops, adc_obj[i].config);
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}
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return result;
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}
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INIT_DEVICE_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADC */
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