405 lines
10 KiB
C
405 lines
10 KiB
C
/*
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* File : serial.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-08-23 Bernard first version
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* 2009-05-14 Bernard add RT-THread device interface
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* 2010-03-14 MingBai US_IMR is read-only.
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* 2010-03-16 MingBai Changed interrupt source mode to level sensitive.
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "AT91SAM7X.h"
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#include "serial.h"
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/**
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* @addtogroup AT91SAM7X256
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*/
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/*@{*/
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typedef volatile rt_uint32_t REG32;
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struct rt_at91serial_hw
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{
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REG32 US_CR; // Control Register
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REG32 US_MR; // Mode Register
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REG32 US_IER; // Interrupt Enable Register
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REG32 US_IDR; // Interrupt Disable Register
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REG32 US_IMR; // Interrupt Mask Register
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REG32 US_CSR; // Channel Status Register
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REG32 US_RHR; // Receiver Holding Register
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REG32 US_THR; // Transmitter Holding Register
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REG32 US_BRGR; // Baud Rate Generator Register
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REG32 US_RTOR; // Receiver Time-out Register
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REG32 US_TTGR; // Transmitter Time-guard Register
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REG32 Reserved0[5]; //
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REG32 US_FIDI; // FI_DI_Ratio Register
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REG32 US_NER; // Nb Errors Register
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REG32 Reserved1[1]; //
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REG32 US_IF; // IRDA_FILTER Register
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REG32 Reserved2[44]; //
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REG32 US_RPR; // Receive Pointer Register
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REG32 US_RCR; // Receive Counter Register
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REG32 US_TPR; // Transmit Pointer Register
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REG32 US_TCR; // Transmit Counter Register
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REG32 US_RNPR; // Receive Next Pointer Register
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REG32 US_RNCR; // Receive Next Counter Register
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REG32 US_TNPR; // Transmit Next Pointer Register
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REG32 US_TNCR; // Transmit Next Counter Register
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REG32 US_PTCR; // PDC Transfer Control Register
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REG32 US_PTSR; // PDC Transfer Status Register
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};
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struct rt_at91serial
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{
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struct rt_device parent;
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struct rt_at91serial_hw* hw_base;
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rt_uint16_t peripheral_id;
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rt_uint32_t baudrate;
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/* reception field */
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rt_uint16_t save_index, read_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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};
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#ifdef RT_USING_UART1
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struct rt_at91serial serial1;
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#endif
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#ifdef RT_USING_UART2
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struct rt_at91serial serial2;
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#endif
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static void rt_hw_serial_isr(int irqno)
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{
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rt_base_t level;
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struct rt_device* device;
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struct rt_at91serial* serial = RT_NULL;
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#ifdef RT_USING_UART1
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if (irqno == AT91C_ID_US0)
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{
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/* serial 1 */
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serial = &serial1;
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}
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#endif
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#ifdef RT_USING_UART2
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if (irqno == AT91C_ID_US1)
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{
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/* serial 2 */
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serial = &serial2;
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}
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#endif
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RT_ASSERT(serial != RT_NULL);
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/* get generic device object */
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device = (rt_device_t)serial;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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/* get received character */
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serial->rx_buffer[serial->save_index] = serial->hw_base->US_RHR;
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/* move to next position */
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serial->save_index ++;
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if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
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serial->save_index = 0;
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/* if the next position is read index, discard this 'read char' */
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if (serial->save_index == serial->read_index)
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{
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serial->read_index ++;
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if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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serial->read_index = 0;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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/* indicate to upper layer application */
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if (device->rx_indicate != RT_NULL)
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device->rx_indicate(device, 1);
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/* ack interrupt */
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AT91C_AIC_EOICR = 1;
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}
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static rt_err_t rt_serial_init (rt_device_t dev)
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{
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rt_uint32_t bd;
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struct rt_at91serial* serial = (struct rt_at91serial*) dev;
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RT_ASSERT(serial != RT_NULL);
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/* must be US0 or US1 */
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RT_ASSERT((serial->peripheral_id == AT91C_ID_US0) ||
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(serial->peripheral_id == AT91C_ID_US1));
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/* Enable Clock for USART */
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AT91C_PMC_PCER = 1 << serial->peripheral_id;
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/* Enable RxD0 and TxDO Pin */
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if (serial->peripheral_id == AT91C_ID_US0)
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{
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/* set pinmux */
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//AT91C_PIO_PDR = (1 << 5) | (1 << 6);
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AT91C_PIO_PDR = 1 | (1 << 1); //fix bug 2010-3-9
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}
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else if (serial->peripheral_id == AT91C_ID_US1)
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{
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/* set pinmux */
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//AT91C_PIO_PDR = (1 << 21) | (1 << 22);
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AT91C_PIO_PDR = (1 << 5) | (1 << 6); //fix bug 2010-3-9
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}
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serial->hw_base->US_CR = AT91C_US_RSTRX | /* Reset Receiver */
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AT91C_US_RSTTX | /* Reset Transmitter */
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AT91C_US_RXDIS | /* Receiver Disable */
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AT91C_US_TXDIS; /* Transmitter Disable */
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serial->hw_base->US_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */
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AT91C_US_CLKS_CLOCK | /* Clock = MCK */
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AT91C_US_CHRL_8_BITS | /* 8-bit Data */
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AT91C_US_PAR_NONE | /* No Parity */
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AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */
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/* set baud rate divisor */
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bd = ((MCK*10)/(serial->baudrate * 16));
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if ((bd % 10) >= 5) bd = (bd / 10) + 1;
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else bd /= 10;
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serial->hw_base->US_BRGR = bd;
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serial->hw_base->US_CR = AT91C_US_RXEN | /* Receiver Enable */
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AT91C_US_TXEN; /* Transmitter Enable */
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/* reset rx index */
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serial->save_index = 0;
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serial->read_index = 0;
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/* reset rx buffer */
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rt_memset(serial->rx_buffer, 0, RT_UART_RX_BUFFER_SIZE);
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return RT_EOK;
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}
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static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
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{
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struct rt_at91serial *serial = (struct rt_at91serial*)dev;
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RT_ASSERT(serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* enable UART rx interrupt */
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serial->hw_base->US_IER = 1 << 0; /* RxReady interrupt */
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// US_IMR is a READ-ONLY register!
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//serial->hw_base->US_IMR |= 1 << 0; /* umask RxReady interrupt */
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/* install UART handler */
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rt_hw_interrupt_install(serial->peripheral_id, rt_hw_serial_isr, RT_NULL);
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// SAM7X Datasheet 30.5.3:
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// It is notrecommended to use the USART interrupt line in edge sensitive mode
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//AT91C_AIC_SMR(serial->peripheral_id) = 5 | (0x01 << 5);
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AT91C_AIC_SMR(serial->peripheral_id) = 5;
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rt_hw_interrupt_umask(serial->peripheral_id);
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}
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return RT_EOK;
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}
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static rt_err_t rt_serial_close(rt_device_t dev)
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{
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struct rt_at91serial *serial = (struct rt_at91serial*)dev;
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RT_ASSERT(serial != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* disable interrupt */
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serial->hw_base->US_IDR = 1 << 0; /* RxReady interrupt */
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//serial->hw_base->US_IMR &= ~(1 << 0); /* mask RxReady interrupt */
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}
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serial->hw_base->US_CR = AT91C_US_RSTRX | /* Reset Receiver */
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AT91C_US_RSTTX | /* Reset Transmitter */
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AT91C_US_RXDIS | /* Receiver Disable */
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AT91C_US_TXDIS; /* Transmitter Disable */
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return RT_EOK;
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}
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static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_at91serial *serial = (struct rt_at91serial*)dev;
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RT_ASSERT(serial != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (serial->read_index != serial->save_index)
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{
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*ptr = serial->rx_buffer[serial->read_index];
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serial->read_index ++;
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if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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serial->read_index = 0;
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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break;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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ptr ++;
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size --;
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}
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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{
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/* not support right now */
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RT_ASSERT(0);
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}
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else
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{
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/* poll mode */
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while (size)
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{
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/* Wait for Full Rx Buffer */
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while (!(serial->hw_base->US_CSR & AT91C_US_RXRDY));
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/* Read Character */
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*ptr = serial->hw_base->US_RHR;
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ptr ++;
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size --;
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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}
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return 0;
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}
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static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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rt_uint8_t* ptr;
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struct rt_at91serial *serial = (struct rt_at91serial*)dev;
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RT_ASSERT(serial != RT_NULL);
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ptr = (rt_uint8_t*) buffer;
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if (dev->open_flag & RT_DEVICE_OFLAG_WRONLY)
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{
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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/* it's a stream mode device */
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while (size)
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{
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/* stream mode */
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if (*ptr == '\n')
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{
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while (!(serial->hw_base->US_CSR & AT91C_US_TXRDY));
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serial->hw_base->US_THR = '\r';
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}
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/* Wait for Empty Tx Buffer */
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while (!(serial->hw_base->US_CSR & AT91C_US_TXRDY));
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/* Transmit Character */
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serial->hw_base->US_THR = *ptr;
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ptr ++;
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size --;
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}
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}
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else
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{
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while (size)
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{
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/* Wait for Empty Tx Buffer */
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while (!(serial->hw_base->US_CSR & AT91C_US_TXRDY));
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/* Transmit Character */
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serial->hw_base->US_THR = *ptr;
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ptr ++;
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size --;
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}
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}
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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}
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static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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return RT_EOK;
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}
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rt_err_t rt_hw_serial_init()
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{
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rt_device_t device;
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#ifdef RT_USING_UART1
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device = (rt_device_t) &serial1;
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/* init serial device private data */
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serial1.hw_base = (struct rt_at91serial_hw*)AT91C_BASE_US0;
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serial1.peripheral_id = AT91C_ID_US0;
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serial1.baudrate = 115200;
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/* set device virtual interface */
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device->init = rt_serial_init;
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device->open = rt_serial_open;
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device->close = rt_serial_close;
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device->read = rt_serial_read;
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device->write = rt_serial_write;
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device->control = rt_serial_control;
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/* register uart1 on device subsystem */
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rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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#endif
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#ifdef RT_USING_UART2
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device = (rt_device_t) &serial2;
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serial2.hw_base = (struct rt_at91serial_hw*)AT91C_BASE_US1;
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serial2.peripheral_id = AT91C_ID_US1;
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serial2.baudrate = 115200;
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/* set device virtual interface */
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device->init = rt_serial_init;
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device->open = rt_serial_open;
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device->close = rt_serial_close;
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device->read = rt_serial_read;
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device->write = rt_serial_write;
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device->control = rt_serial_control;
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/* register uart2 on device subsystem */
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rt_device_register(device, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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#endif
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return RT_EOK;
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}
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/*@}*/
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