Grissiom 19fe6251e7 rm48x50: optimize context_switch_interrupt_to by reuse registers ...

When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.

2013-05-26 22:37:49 +08:00

..

at91sam926x

Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication.

2013-04-08 21:57:24 +08:00

AT91SAM7S

convert end of line

2013-01-08 05:05:02 -08:00

AT91SAM7X

update AT91SAM7X: Modify the interrupt interface implementations.

2013-03-31 17:43:09 +08:00

common

convert end of line

2013-01-08 05:05:02 -08:00

cortex-m0

port stm32f0x to gcc.

2013-02-20 22:03:31 +08:00

cortex-m3

code cleanup for interrupt description

2013-03-26 08:52:33 +08:00

cortex-m4

convert end of line

2013-01-08 05:05:02 -08:00

lpc24xx

update LPC2478: Modify the interrupt interface implementations.

2013-03-31 18:25:51 +08:00

lpc214x

update LPC214X: Modify the interrupt interface implementations.

2013-03-31 17:58:26 +08:00

rm48x50

rm48x50: optimize context_switch_interrupt_to by reuse registers

2013-05-26 22:37:49 +08:00

s3c24x0

update mini2440: Modify the interrupt interface implementations.

2013-03-31 17:30:30 +08:00

s3c44b0

convert end of line

2013-01-08 05:05:02 -08:00

sep4020

fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020

2013-04-10 00:49:18 +08:00