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onelife.real 19e3ce5ee3 *** EFM32 branch ***
1. Add interrupt context check function (context_gcc.S)
2. Add lock (semaphore) for IIC, USART and Ethernet drivers to prevent simultaneously access
3. Add multiple channels support for scan mode of ADC driver
4. Modify miscellaneous drivers according to ADC driver changes
5. Add SWO output enable function (board.c)
6. Disable all interrupts in GPIO interrupt handler (hdl_interrupt.c)
7. Add two Ethernet utility functions (drv_ethernet.c)
8. Add accelerometer driver (analog output)
9. Add accelerometer demo (draft, application.c)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1654 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-07-29 02:47:37 +00:00

66 lines
2.1 KiB
C

/***************************************************************************//**
* @file drv_iic.h
* @brief IIC driver of RT-Thread RTOS for EFM32
* COPYRIGHT (C) 2011, RT-Thread Development Team
* @author onelife
* @version 0.4 beta
*******************************************************************************
* @section License
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
*******************************************************************************
* @section Change Logs
* Date Author Notes
* 2011-01-07 onelife Initial creation for EFM32
* 2011-07-11 onelife Add lock (semaphore) to prevent simultaneously
* access
******************************************************************************/
#ifndef __DRV_IIC_H__
#define __DRV_IIC_H__
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
struct efm32_iic_int_mode_t
{
rt_uint8_t *data_ptr;
rt_uint8_t data_size;
rt_uint32_t read_index, save_index;
};
struct efm32_iic_device_t
{
/* Counter */
rt_uint32_t counter;
/* Lock */
struct rt_semaphore *lock;
/* State */
rt_uint8_t state;
/* Pointer to IIC device structure */
I2C_TypeDef *iic_device;
/* Master address */
rt_uint16_t master_address;
/* Slave address */
rt_uint16_t slave_address;
/* RX structure */
struct efm32_iic_int_mode_t *rx_buffer;
};
struct efm32_iic_control_t
{
rt_uint8_t config;
rt_uint16_t master_address;
rt_uint16_t slave_address;
};
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#define IIC_STATE_MASTER (1 << 0)
#define IIC_STATE_BROADCAST (1 << 1)
//#define IIC_STATE_TX_BUSY (1 << 2)
#define IIC_STATE_RX_BUSY (1 << 3)
/* Exported functions --------------------------------------------------------*/
void rt_hw_iic_init(void);
#endif /* __DRV_IIC_H__ */