239 lines
6.4 KiB
C
239 lines
6.4 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-29 zdzn first version
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*/
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#include "drv_i2c.h"
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//Maybe redefined
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typedef unsigned long rt_ubase_t;
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typedef rt_ubase_t rt_size_t;
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rt_uint8_t i2c_read_or_write(volatile rt_uint32_t base, rt_uint8_t* buf, rt_uint32_t len, rt_uint8_t flag)
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{
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rt_uint32_t status;
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rt_uint32_t remaining = len;
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rt_uint32_t i = 0;
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rt_uint8_t reason = BCM283X_I2C_REASON_OK;
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/* Clear FIFO */
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BCM283X_BSC_C(base) |= (BSC_C_CLEAR_1 & BSC_C_CLEAR_1);
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/* Clear Status */
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BCM283X_BSC_S(base) = BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE;
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/* Set Data Length */
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BCM283X_BSC_DLEN(base) = len;
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if (flag)
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{
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/* Start read */
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BCM283X_BSC_C(base) = BSC_C_I2CEN | BSC_C_ST | BSC_C_READ;
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/* wait for transfer to complete */
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while (!(BCM283X_BSC_S(base) & BSC_S_DONE))
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{
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/* we must empty the FIFO as it is populated and not use any delay */
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while (remaining && (BCM283X_BSC_S(base) & BSC_S_RXD))
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{
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/* Read from FIFO, no barrier */
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buf[i] = BCM283X_BSC_FIFO(base);
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i++;
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remaining--;
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}
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}
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/* transfer has finished - grab any remaining stuff in FIFO */
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while (remaining && (BCM283X_BSC_S(base) & BSC_S_RXD))
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{
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/* Read from FIFO, no barrier */
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buf[i] = BCM283X_BSC_FIFO(base);
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i++;
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remaining--;
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}
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}
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else
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{
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/* pre populate FIFO with max buffer */
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while (remaining && (i < BSC_FIFO_SIZE))
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{
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BCM283X_BSC_FIFO(base) = buf[i];
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i++;
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remaining--;
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}
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/* Enable device and start transfer */
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BCM283X_BSC_C(base) = BSC_C_I2CEN | BSC_C_ST;
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/* Transfer is over when BCM2835_BSC_S_DONE */
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while (!(BCM283X_BSC_S(base) & BSC_S_DONE))
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{
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while (remaining && (BCM283X_BSC_S(base) & BSC_S_TXD))
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{
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/* Write to FIFO */
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BCM283X_BSC_FIFO(base) = buf[i];
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i++;
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remaining--;
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}
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}
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}
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status = BCM283X_BSC_S(base);
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if (status & BSC_S_ERR)
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{
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reason = BCM283X_I2C_REASON_ERROR_NACK;
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}
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else if (status & BSC_S_CLKT)
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{
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reason = BCM283X_I2C_REASON_ERROR_CLKT;
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}
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else if (remaining)
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{
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reason = BCM283X_I2C_REASON_ERROR_DATA;
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}
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BCM283X_BSC_C(base) |= (BSC_S_DONE & BSC_S_DONE);
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return reason;
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}
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struct raspi_i2c_hw_config
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{
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rt_uint8_t bsc_num;
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rt_uint8_t sdl_pin;
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rt_uint8_t scl_pin;
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rt_uint8_t sdl_mode;
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rt_uint8_t scl_mode;
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};
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#if (defined(BSP_USING_I2C0) || defined(BSP_USING_I2C1))
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static rt_size_t raspi_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num);
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static rt_size_t raspi_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num);
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static rt_err_t raspi_i2c_bus_control(struct rt_i2c_bus_device *bus,
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rt_uint32_t,
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rt_uint32_t);
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static rt_uint32_t i2c_byte_wait_us = 0;
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static rt_size_t raspi_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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rt_size_t i;
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rt_uint8_t reason;
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RT_ASSERT(bus != RT_NULL);
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volatile rt_uint32_t base = (volatile rt_uint32_t)(bus->parent.user_data);
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if (bus->addr == 0)
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base = BCM283X_BSC0_BASE;
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else
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base = BCM283X_BSC1_BASE;
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BCM283X_BSC_A(base) = msgs->addr;
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for (i = 0; i < num; i++)
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{
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if (msgs[i].flags & RT_I2C_RD)
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reason = i2c_read_or_write(base, msgs->buf, msgs->len, 1);
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else
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reason = i2c_read_or_write(base, msgs->buf, msgs->len, 0);
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}
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return (reason == 0)? i : 0;
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}
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static rt_size_t raspi_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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return 0;
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}
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static rt_err_t raspi_i2c_bus_control(struct rt_i2c_bus_device *bus,
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rt_uint32_t cmd,
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rt_uint32_t arg)
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{
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return RT_EOK;
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}
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static const struct rt_i2c_bus_device_ops raspi_i2c_ops =
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{
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.master_xfer = raspi_i2c_mst_xfer,
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.slave_xfer = raspi_i2c_slv_xfer,
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.i2c_bus_control = raspi_i2c_bus_control,
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};
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static rt_err_t raspi_i2c_configure(struct raspi_i2c_hw_config *cfg)
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{
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RT_ASSERT(cfg != RT_NULL);
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volatile rt_uint32_t base = cfg->scl_mode ? BCM283X_BSC1_BASE : BCM283X_BSC0_BASE;
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GPIO_FSEL(cfg->sdl_pin, cfg->sdl_mode); /* SDA */
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GPIO_FSEL(cfg->scl_pin, cfg->scl_mode); /* SCL */
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/* use 0xFFFE mask to limit a max value and round down any odd number */
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rt_uint32_t divider = (BCM283X_CORE_CLK_HZ / 10000) & 0xFFFE;
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BCM283X_BSC_DIV(base) = (rt_uint16_t) divider;
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i2c_byte_wait_us = (divider * 1000000 * 9 / BCM283X_CORE_CLK_HZ);
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return RT_EOK;
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}
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#endif
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#if defined (BSP_USING_I2C0)
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#define I2C0_BUS_NAME "i2c0"
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static struct raspi_i2c_hw_config hw_device0 =
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{
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.bsc_num = 0,
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.sdl_pin = RPI_GPIO_P1_27,
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.scl_pin = RPI_GPIO_P1_28,
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.sdl_mode = BCM283X_GPIO_FSEL_ALT0,
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.scl_mode = BCM283X_GPIO_FSEL_ALT0,
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};
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struct rt_i2c_bus_device device0 =
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{
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.ops = &raspi_i2c_ops,
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.addr = 0,
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};
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#endif
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#if defined (BSP_USING_I2C1)
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#define I2C1_BUS_NAME "i2c1"
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static struct raspi_i2c_hw_config hw_device1 =
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{
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.bsc_num = 1,
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.sdl_pin = RPI_GPIO_P1_03,
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.scl_pin = RPI_GPIO_P1_05,
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.sdl_mode = BCM283X_GPIO_FSEL_ALT0,
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.scl_mode = BCM283X_GPIO_FSEL_ALT0,
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};
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struct rt_i2c_bus_device device1 =
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{
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.ops = &raspi_i2c_ops,
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.addr = 1,
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};
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#endif
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int rt_hw_i2c_init(void)
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{
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#if defined(BSP_USING_I2C0)
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raspi_i2c_configure(&hw_device0);
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rt_i2c_bus_device_register(&device0, I2C0_BUS_NAME);
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#endif
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#if defined(BSP_USING_I2C1)
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raspi_i2c_configure(&hw_device1);
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rt_i2c_bus_device_register(&device1, I2C1_BUS_NAME);
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#endif
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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