448 lines
11 KiB
C
448 lines
11 KiB
C
/*
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* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/******************************************************************************
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* @file csi_instr.h
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* @brief CSI Header File for instruct.
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* @version V1.0
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* @date 02. June 2017
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******************************************************************************/
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#ifndef _CSI_INSTR_H_
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#define _CSI_INSTR_H_
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#define __CSI_GCC_OUT_REG(r) "=r" (r)
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#define __CSI_GCC_USE_REG(r) "r" (r)
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/**
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\brief No Operation
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\details No Operation does nothing. This instruction can be used for code alignment purposes.
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*/
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__ALWAYS_INLINE void __NOP(void)
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{
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__ASM volatile("nop");
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}
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/**
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\brief Wait For Interrupt
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\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
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*/
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__ALWAYS_INLINE void __WFI(void)
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{
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__ASM volatile("wait");
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}
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/**
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\brief Wait For Interrupt
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\details Wait For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
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*/
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__ALWAYS_INLINE void __WAIT(void)
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{
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__ASM volatile("wait");
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}
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/**
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\brief Doze For Interrupt
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\details Doze For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
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*/
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__ALWAYS_INLINE void __DOZE(void)
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{
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__ASM volatile("doze");
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}
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/**
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\brief Stop For Interrupt
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\details Stop For Interrupt is a hint instruction that suspends execution until one interrupt occurs.
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*/
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__ALWAYS_INLINE void __STOP(void)
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{
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__ASM volatile("stop");
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}
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/**
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\brief Instruction Synchronization Barrier
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\details Instruction Synchronization Barrier flushes the pipeline in the processor,
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so that all instructions following the ISB are fetched from cache or memory,
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after the instruction has been completed.
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*/
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__ALWAYS_INLINE void __ISB(void)
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{
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__ASM volatile("sync"::: "memory");
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}
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/**
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\brief Data Synchronization Barrier
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\details Acts as a special kind of Data Memory Barrier.
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It completes when all explicit memory accesses before this instruction complete.
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*/
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__ALWAYS_INLINE void __DSB(void)
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{
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__ASM volatile("sync"::: "memory");
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}
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/**
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\brief Data Memory Barrier
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\details Ensures the apparent order of the explicit memory operations before
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and after the instruction, without ensuring their completion.
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*/
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__ALWAYS_INLINE void __DMB(void)
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{
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__ASM volatile("sync"::: "memory");
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}
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/**
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\brief Reverse byte order (32 bit)
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\details Reverses the byte order in integer value.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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__ALWAYS_INLINE uint32_t __REV(uint32_t value)
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{
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return __builtin_bswap32(value);
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}
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/**
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\brief Reverse byte order (16 bit)
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\details Reverses the byte order in two unsigned short values.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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__ALWAYS_INLINE uint32_t __REV16(uint32_t value)
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{
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uint32_t result;
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#if (__CK80X >= 2)
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__ASM volatile("revh %0, %1" : __CSI_GCC_OUT_REG(result) : __CSI_GCC_USE_REG(value));
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#else
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result = ((value & 0xFF000000) >> 8) | ((value & 0x00FF0000) << 8) |
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((value & 0x0000FF00) >> 8) | ((value & 0x000000FF) << 8);
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#endif
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return (result);
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}
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/**
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\brief Reverse byte order in signed short value
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\details Reverses the byte order in a signed short value with sign extension to integer.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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__ALWAYS_INLINE int32_t __REVSH(int32_t value)
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{
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return (short)(((value & 0xFF00) >> 8) | ((value & 0x00FF) << 8));
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}
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/**
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\brief Rotate Right in unsigned value (32 bit)
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\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
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\param [in] op1 Value to rotate
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\param [in] op2 Number of Bits to rotate
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\return Rotated value
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*/
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__ALWAYS_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
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{
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return (op1 >> op2) | (op1 << (32U - op2));
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}
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/**
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\brief Breakpoint
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\details Causes the processor to enter Debug state
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Debug tools can use this to investigate system state when the instruction at a particular address is reached.
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*/
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__ALWAYS_INLINE void __BKPT()
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{
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__ASM volatile("bkpt");
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}
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/**
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\brief Reverse bit order of value
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\details Reverses the bit order of the given value.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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__ALWAYS_INLINE uint32_t __RBIT(uint32_t value)
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{
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uint32_t result;
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#if (__CK80X >= 0x03U)
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__ASM volatile("brev %0, %1" : "=r"(result) : "r"(value));
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#else
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int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
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result = value; /* r will be reversed bits of v; first get LSB of v */
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for (value >>= 1U; value; value >>= 1U)
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{
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result <<= 1U;
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result |= value & 1U;
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s--;
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}
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result <<= s; /* shift when v's highest bits are zero */
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#endif
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return (result);
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}
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/**
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\brief Count leading zeros
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\details Counts the number of leading zeros of a data value.
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\param [in] value Value to count the leading zeros
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\return number of leading zeros in value
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*/
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#define __CLZ __builtin_clz
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/**
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\details This function saturates a signed value.
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\param [in] x Value to be saturated
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\param [in] y Bit position to saturate to [1..32]
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\return Saturated value.
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*/
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__ALWAYS_INLINE int32_t __SSAT(int32_t x, uint32_t y)
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{
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int32_t posMax, negMin;
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uint32_t i;
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posMax = 1;
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for (i = 0; i < (y - 1); i++)
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{
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posMax = posMax * 2;
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}
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if (x > 0)
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{
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posMax = (posMax - 1);
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if (x > posMax)
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{
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x = posMax;
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}
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// x &= (posMax * 2 + 1);
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}
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else
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{
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negMin = -posMax;
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if (x < negMin)
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{
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x = negMin;
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}
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// x &= (posMax * 2 - 1);
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}
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return (x);
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}
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/**
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\brief Unsigned Saturate
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\details Saturates an unsigned value.
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\param [in] value Value to be saturated
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\param [in] sat Bit position to saturate to (0..31)
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\return Saturated value
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*/
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__ALWAYS_INLINE uint32_t __USAT(uint32_t value, uint32_t sat)
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{
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uint32_t result;
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if ((((0xFFFFFFFF >> sat) << sat) & value) != 0)
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{
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result = 0xFFFFFFFF >> (32 - sat);
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}
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else
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{
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result = value;
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}
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return (result);
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}
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/**
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\brief Unsigned Saturate for internal use
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\details Saturates an unsigned value, should not call directly.
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\param [in] value Value to be saturated
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\param [in] sat Bit position to saturate to (0..31)
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\return Saturated value
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*/
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__ALWAYS_INLINE uint32_t __IUSAT(uint32_t value, uint32_t sat)
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{
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uint32_t result;
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if (value & 0x80000000) /* only overflow set bit-31 */
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{
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result = 0;
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}
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else if ((((0xFFFFFFFF >> sat) << sat) & value) != 0)
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{
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result = 0xFFFFFFFF >> (32 - sat);
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}
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else
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{
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result = value;
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}
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return (result);
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}
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/**
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\brief Rotate Right with Extend
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\details This function moves each bit of a bitstring right by one bit.
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The carry input is shifted in at the left end of the bitstring.
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\note carry input will always 0.
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\param [in] op1 Value to rotate
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\return Rotated value
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*/
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__ALWAYS_INLINE uint32_t __RRX(uint32_t op1)
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{
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#if (__CK80X >= 2)
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uint32_t res = 0;
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__ASM volatile("bgeni t0, 31\n\t"
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"lsri %0, 1\n\t"
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"movt %1, t0\n\t"
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"or %1, %1, %0\n\t"
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: "=r"(op1), "=r"(res): "0"(op1), "1"(res): "t0");
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return res;
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#else
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uint32_t res = 0;
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__ASM volatile("movi r7, 0\n\t"
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"bseti r7, 31\n\t"
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"lsri %0, 1\n\t"
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"bf 1f\n\t"
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"mov %1, r7\n\t"
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"1:\n\t"
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"or %1, %1, %0\n\t"
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: "=r"(op1), "=r"(res): "0"(op1), "1"(res): "r7");
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return res;
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#endif
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}
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/**
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\brief LDRT Unprivileged (8 bit)
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\details Executes a Unprivileged LDRT instruction for 8 bit value.
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\param [in] addr Pointer to location
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\return value of type uint8_t at (*ptr)
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*/
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__ALWAYS_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
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{
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uint32_t result;
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//#warning "__LDRBT"
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__ASM volatile("ldb %0, (%1, 0)" : "=r"(result) : "r"(addr));
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return ((uint8_t) result); /* Add explicit type cast here */
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}
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/**
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\brief LDRT Unprivileged (16 bit)
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\details Executes a Unprivileged LDRT instruction for 16 bit values.
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\param [in] addr Pointer to location
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\return value of type uint16_t at (*ptr)
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*/
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__ALWAYS_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
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{
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uint32_t result;
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//#warning "__LDRHT"
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__ASM volatile("ldh %0, (%1, 0)" : "=r"(result) : "r"(addr));
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return ((uint16_t) result); /* Add explicit type cast here */
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}
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/**
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\brief LDRT Unprivileged (32 bit)
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\details Executes a Unprivileged LDRT instruction for 32 bit values.
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\param [in] addr Pointer to location
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\return value of type uint32_t at (*ptr)
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*/
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__ALWAYS_INLINE uint32_t __LDRT(volatile uint32_t *addr)
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{
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uint32_t result;
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//#warning "__LDRT"
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__ASM volatile("ldw %0, (%1, 0)" : "=r"(result) : "r"(addr));
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return (result);
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}
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/**
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\brief STRT Unprivileged (8 bit)
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\details Executes a Unprivileged STRT instruction for 8 bit values.
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\param [in] value Value to store
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\param [in] addr Pointer to location
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*/
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__ALWAYS_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
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{
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//#warning "__STRBT"
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__ASM volatile("stb %1, (%0, 0)" :: "r"(addr), "r"((uint32_t)value) : "memory");
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}
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/**
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\brief STRT Unprivileged (16 bit)
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\details Executes a Unprivileged STRT instruction for 16 bit values.
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\param [in] value Value to store
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\param [in] addr Pointer to location
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*/
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__ALWAYS_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
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{
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//#warning "__STRHT"
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__ASM volatile("sth %1, (%0, 0)" :: "r"(addr), "r"((uint32_t)value) : "memory");
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}
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/**
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\brief STRT Unprivileged (32 bit)
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\details Executes a Unprivileged STRT instruction for 32 bit values.
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\param [in] value Value to store
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\param [in] addr Pointer to location
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*/
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__ALWAYS_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
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{
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//#warning "__STRT"
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__ASM volatile("stw %1, (%0, 0)" :: "r"(addr), "r"(value) : "memory");
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}
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/*@}*/ /* end of group CSI_Core_InstructionInterface */
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/* ########################## FPU functions #################################### */
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/**
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\brief get FPU type
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\details returns the FPU type, always 0.
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\returns
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- \b 0: No FPU
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- \b 1: Single precision FPU
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- \b 2: Double + Single precision FPU
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*/
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__ALWAYS_INLINE uint32_t __get_FPUType(void)
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{
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uint32_t result;
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__ASM volatile("mfcr %0, cr<13, 0>" : "=r"(result));
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return 0;
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}
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#endif /* _CSI_INSTR_H_ */
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