388 lines
12 KiB
C
388 lines
12 KiB
C
#include <rthw.h>
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#include <rtthread.h>
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#include "stm32f10x.h"
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/*
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SCLK PA5 SPI1_SCK
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SDIN PA7 SPI1_MOSI
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CSB PC5
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*/
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#define wm_csb_0 GPIO_ResetBits(GPIOC,GPIO_Pin_5)
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#define wm_csb_1 GPIO_SetBits(GPIOC,GPIO_Pin_5)
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#define DATA_NODE_MAX 5
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/* data node for Tx Mode */
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struct wm8753_data_node
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{
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rt_uint16_t *data_ptr;
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rt_size_t data_size;
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};
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struct wm8753_device
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{
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/* inherit from rt_device */
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struct rt_device parent;
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/* pcm data list */
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struct wm8753_data_node data_list[DATA_NODE_MAX];
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rt_uint16_t read_index, put_index;
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/* transmitted offset of current data node */
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rt_size_t offset;
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};
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struct wm8753_device wm8753;
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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/* SPI2 IRQ Channel configuration */
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NVIC_InitStructure.NVIC_IRQChannel = SPI2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* DMA1 IRQ Channel configuration */
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NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Disable the JTAG interface and enable the SWJ interface */
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GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE);
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/* PC5 CODEC CS */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOC,&GPIO_InitStructure);
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/* Configure SPI2 pins: CK, WS and SD */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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#if 0
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/* MCO configure */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOA,&GPIO_InitStructure);
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RCC_MCOConfig(RCC_MCO_HSE);
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#endif
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}
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#define SPI2_DR_Address 0x4000380C
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static void DMA_Configuration(rt_uint32_t addr, rt_size_t size)
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{
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DMA_InitTypeDef DMA_InitStructure;
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/* DMA1 Channel2 configuration ----------------------------------------------*/
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DMA_Cmd(DMA1_Channel5, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)SPI2_DR_Address;
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)addr;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel5, &DMA_InitStructure);
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/* Enable SPI2 DMA Tx request */
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SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
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DMA_ITConfig(DMA1_Channel5, DMA_IT_TC, ENABLE);
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DMA_Cmd(DMA1_Channel5, ENABLE);
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}
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static void I2S_Configuration(void)
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{
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I2S_InitTypeDef I2S_InitStructure;
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/* I2S peripheral configuration */
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I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
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I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_44k;
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I2S_InitStructure.I2S_CPOL = I2S_CPOL_High;// I2S_CPOL_Low
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/* I2S2 Master Transmitter to I2S3 Slave Receiver communication -----------*/
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/* I2S2 configuration */
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I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;//I2S_Mode_MasterTx I2S_Mode_SlaveTx
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I2S_Init(SPI2, &I2S_InitStructure);
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}
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unsigned char SPI_WriteByte(unsigned char data)
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{
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unsigned char Data = 0;
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//Wait until the transmit buffer is empty
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while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_TXE)==RESET);
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// Send the byte
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SPI_I2S_SendData(SPI1,data);
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//Wait until a data is received
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while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE)==RESET);
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// Get the received data
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Data = SPI_I2S_ReceiveData(SPI1);
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// Return the shifted data
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return Data;
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}
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void wm8753_send(rt_uint16_t s_data)
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{
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wm_csb_0;
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SPI_WriteByte( (s_data>>8)&0xFF );
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SPI_WriteByte( s_data&0xFF );
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wm_csb_1;
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}
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static rt_err_t wm8753_init (rt_device_t dev)
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{
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wm8753_send(0<<9 | 0xFF); // reset
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/* POWER manager */
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wm8753_send(1<<9 | (1<<8) | (0<<7) | (0<<6) | (0<<5) | (1<<4) | (1<<3) | (1<<2) | 2 );//<2F><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>
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wm8753_send(2<<9 | (1<<8) | (1<<7) | (1<<5) | (1<<4) | (1<<3) | (1<<2) ); // <20><EFBFBD>Դ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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wm8753_send(3<<9 | (0<<8) | (0<<7) | (1<<6) | (1<<5) | (1<<3) | (1<<2) | (1<<1) | 1 ); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DAC
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/* IIS DAC test */
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wm8753_send(4<<9 | (0<<7) | (2<<3) );//IIS 16BIT
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// 12.288/3/8=512K
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wm8753_send(6<<9 | (0<<5) | (3<<2)| 0);//0: slave 1: master | (3<<5) | (3<<2)
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wm8753_send(43<<9 | (1<<4) );//INVROUT2
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/* <20><><EFBFBD>ó<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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wm8753_send(52<<9 | (1<<8) | (1<<7) | 35 ); // LOUT1 0-57-63
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wm8753_send(53<<9 | (1<<8) | (1<<7) | 35 ); // ROUT1 0-57-63
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wm8753_send(54<<9 | (1<<8) | (1<<7) | 35 ); // LOUT2 0-57-63
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wm8753_send(55<<9 | (1<<8) | (1<<7) | 35 ); // ROUT2 0-57-63
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#if 1
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/* LINE IN test */
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wm8753_send(47<<9 | (1<<8) | (1<<4) ); //L LINE_IN VOL (6:4)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: 0-<2D><> 1-12DB 2-9DB 5-0db 7+6DB
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wm8753_send(48<<9 | (1<<8) | (1<<4) ); //R LINE_IN VOL (6:4)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: 0-<2D><> 1-12DB 2-9DB 5-0db 7+6DB
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wm8753_send(50<<9 | (5<<2) | (1<<1) | (1<<0) );//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> (4:2)<29><><EFBFBD><EFBFBD> 0-<2D><> 1-12DB 2-9DB 5-0db 7+6DB
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wm8753_send(51<<9 | (5<<2) | (1<<1) | (1<<0) );//<2F><><EFBFBD><EFBFBD><EFBFBD>Ҽ<EFBFBD><D2BC><EFBFBD> (4:2)<29><><EFBFBD><EFBFBD> 0-<2D><> 1-12DB 2-9DB 5-0db 7+6DB
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/* MIC test */
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wm8753_send(44<<9 | (1<<8) | (1<<5) | (1<<4) | (0<<2) | (1<<1) | (1<<0) );//MIC<49><43><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>
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wm8753_send(45<<9 | 50);//16-0 63-35
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wm8753_send(46<<9 | 50);//16-0 63-35
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#endif
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return RT_EOK;
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}
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#include <finsh.h>
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//0~57~63
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void vol(int v)
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{
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wm8753_send(52<<9 | (0<<8) | (1<<7) | v ); // LOUT1 0-57-63
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wm8753_send(53<<9 | (1<<8) | (1<<7) | v ); // ROUT1 0-57-63
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wm8753_send(54<<9 | (0<<8) | (1<<7) | v ); // LOUT2 0-57-63
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wm8753_send(55<<9 | (1<<8) | (1<<7) | v ); // ROUT2 0-57-63
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}
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FINSH_FUNCTION_EXPORT(vol, set volume)
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static rt_err_t wm8753_open(rt_device_t dev, rt_uint16_t oflag)
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{
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/* enable I2S */
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I2S_Cmd(SPI2, ENABLE);
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return RT_EOK;
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}
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static rt_err_t wm8753_close(rt_device_t dev)
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{
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/* interrupt mode */
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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/* Disable the I2S2 */
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I2S_Cmd(SPI2, DISABLE);
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}
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/* remove all data node */
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return RT_EOK;
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}
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static rt_err_t wm8753_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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/* rate control */
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return RT_EOK;
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}
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static rt_size_t wm8753_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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struct wm8753_device* device;
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struct wm8753_data_node* node;
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rt_uint32_t level;
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rt_uint16_t next_index;
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device = (struct wm8753_device*)dev;
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RT_ASSERT(device != RT_NULL);
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next_index = device->put_index + 1;
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if (next_index >= DATA_NODE_MAX) next_index = 0;
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/* check data_list full */
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if (next_index == device->read_index)
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{
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rt_set_errno(-RT_EFULL);
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return 0;
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}
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level = rt_hw_interrupt_disable();
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node = &device->data_list[device->put_index];
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device->put_index = next_index;
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// rt_kprintf("+\n");
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/* set node attribute */
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node->data_ptr = (rt_uint16_t*)buffer;
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node->data_size = size >> 1; /* size is byte unit, convert to half word unit */
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next_index = device->read_index + 1;
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if (next_index >= DATA_NODE_MAX) next_index = 0;
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/* check data list whether is empty */
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if (next_index == device->put_index)
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{
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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device->offset = 0;
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/* enable I2S interrupt */
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SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
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{
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DMA_Configuration((rt_uint32_t)node->data_ptr, node->data_size);
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}
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}
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rt_hw_interrupt_enable(level);
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return size;
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}
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rt_err_t wm8753_hw_init(void)
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{
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rt_device_t dev;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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NVIC_Configuration();
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GPIO_Configuration();
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I2S_Configuration();
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dev = (rt_device_t)&wm8753;
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dev->type = RT_Device_Class_Unknown;
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dev->rx_indicate = RT_NULL;
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dev->tx_complete = RT_NULL;
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dev->init = wm8753_init;
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dev->open = wm8753_open;
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dev->close = wm8753_close;
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dev->read = RT_NULL;
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dev->write = wm8753_write;
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dev->control = wm8753_control;
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dev->private = RT_NULL;
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/* set read_index and put index to 0 */
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wm8753.read_index = 0;
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wm8753.put_index = 0;
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/* unselect */
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wm_csb_1;
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/* register the device */
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return rt_device_register(&wm8753.parent, "snd",
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RT_DEVICE_FLAG_WRONLY | RT_DEVICE_FLAG_DMA_TX);
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}
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void wm8753_isr()
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{
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struct wm8753_data_node* node;
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node = &wm8753.data_list[wm8753.read_index]; /* get current data node */
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if (SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET)
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{
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SPI_I2S_SendData(SPI2, node->data_ptr[wm8753.offset++]);
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}
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if (wm8753.offset == node->data_size)
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{
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/* move to next node */
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rt_uint16_t next_index;
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next_index = wm8753.read_index + 1;
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if (next_index >= DATA_NODE_MAX) next_index = 0;
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/* notify transmitted complete. */
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if (wm8753.parent.tx_complete != RT_NULL)
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{
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wm8753.parent.tx_complete (&wm8753.parent, wm8753.data_list[wm8753.read_index].data_ptr);
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rt_kprintf("-\n");
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}
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wm8753.offset = 0;
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wm8753.read_index = next_index;
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if (next_index == wm8753.put_index)
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{
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/* no data on the list, disable I2S interrupt */
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SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, DISABLE);
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rt_kprintf("*\n");
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}
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}
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}
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void wm8753_dma_isr()
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{
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/* switch to next buffer */
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rt_uint16_t next_index;
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void* data_ptr;
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next_index = wm8753.read_index + 1;
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if (next_index >= DATA_NODE_MAX) next_index = 0;
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/* save current data pointer */
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data_ptr = wm8753.data_list[wm8753.read_index].data_ptr;
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wm8753.read_index = next_index;
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if (next_index != wm8753.put_index)
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{
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/* enable next dma request */
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DMA_Configuration((rt_uint32_t)wm8753.data_list[wm8753.read_index].data_ptr,
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wm8753.data_list[wm8753.read_index].data_size);
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}
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else
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{
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rt_kprintf("*\n");
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}
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/* notify transmitted complete. */
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if (wm8753.parent.tx_complete != RT_NULL)
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{
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wm8753.parent.tx_complete (&wm8753.parent, data_ptr);
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// rt_kprintf("-\n");
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}
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}
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