217 lines
5.3 KiB
C
217 lines
5.3 KiB
C
/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2010-11-13 weety first version
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include <mmu.h>
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#include "board.h"
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/**
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* @addtogroup dm365
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*/
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/*@{*/
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#if defined(__CC_ARM)
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extern int Image$$ER_ZI$$ZI$$Base;
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extern int Image$$ER_ZI$$ZI$$Length;
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extern int Image$$ER_ZI$$ZI$$Limit;
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#elif (defined (__GNUC__))
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rt_uint8_t _irq_stack_start[1024];
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rt_uint8_t _fiq_stack_start[1024];
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rt_uint8_t _undefined_stack_start[512];
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rt_uint8_t _abort_stack_start[512];
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rt_uint8_t _svc_stack_start[1024] RT_SECTION(".nobss");
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extern unsigned char __bss_start;
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extern unsigned char __bss_end;
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#endif
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extern void rt_hw_clock_init(void);
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extern void rt_hw_uart_init(void);
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static struct mem_desc dm365_mem_desc[] = {
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{ 0x80000000, 0x88000000-1, 0x80000000, SECT_RW_CB, 0, SECT_MAPPED }, /* 128M cached SDRAM memory */
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{ 0xA0000000, 0xA8000000-1, 0x80000000, SECT_RW_NCNB, 0, SECT_MAPPED }, /* 128M No cached SDRAM memory */
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{ 0xFFFF0000, 0xFFFF1000-1, 0x80000000, SECT_TO_PAGE, PAGE_RO_CB, PAGE_MAPPED }, /* isr vector table */
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{ 0x01C00000, 0x02000000-1, 0x01C00000, SECT_RW_NCNB, 0, SECT_MAPPED }, /* CFG BUS peripherals */
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{ 0x02000000, 0x0A000000-1, 0x02000000, SECT_RW_NCNB, 0, SECT_MAPPED }, /* AEMIF */
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};
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/**
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* This function will handle rtos timer
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*/
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void rt_timer_handler(int vector, void *param)
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{
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rt_tick_increase();
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}
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/**
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* This function will init timer0 for system ticks
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*/
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void rt_hw_timer_init()
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{
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/* timer0, input clocks 24MHz */
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volatile timer_regs_t *regs =
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(volatile timer_regs_t*)DAVINCI_TIMER1_BASE;//DAVINCI_TIMER0_BASE;
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psc_change_state(DAVINCI_DM365_LPSC_TIMER0, 3);
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psc_change_state(DAVINCI_DM365_LPSC_TIMER1, 3);
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/*disable timer*/
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regs->tcr &= ~(0x3UL << 6);
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//TIMMODE 32BIT UNCHAINED MODE
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regs->tgcr |=(0x1UL << 2);
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/*not in reset timer */
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regs->tgcr |= (0x1UL << 0);
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//regs->tgcr &= ~(0x1UL << 1);
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/* set Period Registers */
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regs->prd12 = 24000000/RT_TICK_PER_SECOND;
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regs->tim12 = 0;
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/* Set enable mode */
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regs->tcr |= (0x2UL << 6); //period mode
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/* install interrupt handler */
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rt_hw_interrupt_install(IRQ_DM365_TINT2, rt_timer_handler,
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RT_NULL, "timer1_12");//IRQ_DM365_TINT0_TINT12
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rt_hw_interrupt_umask(IRQ_DM365_TINT2);//IRQ_DM365_TINT2
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}
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#define LSR_DR 0x01 /* Data ready */
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#define LSR_THRE 0x20 /* Xmit holding register empty */
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#define BPS 115200 /* serial baudrate */
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typedef struct uartport
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{
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volatile rt_uint32_t rbr;
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volatile rt_uint32_t ier;
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volatile rt_uint32_t fcr;
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volatile rt_uint32_t lcr;
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volatile rt_uint32_t mcr;
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volatile rt_uint32_t lsr;
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volatile rt_uint32_t msr;
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volatile rt_uint32_t scr;
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volatile rt_uint32_t dll;
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volatile rt_uint32_t dlh;
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volatile rt_uint32_t res[2];
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volatile rt_uint32_t pwremu_mgmt;
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volatile rt_uint32_t mdr;
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}uartport;
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#define thr rbr
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#define iir fcr
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#define UART0 ((struct uartport *)DAVINCI_UART0_BASE)
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static void davinci_uart_putc(char c)
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{
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while (!(UART0->lsr & LSR_THRE));
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UART0->thr = c;
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}
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/**
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* This function is used to display a string on console, normally, it's
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* invoked by rt_kprintf
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*
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* @param str the displayed string
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*/
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void rt_hw_console_output(const char* str)
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{
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while (*str)
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{
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if (*str=='\n')
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{
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davinci_uart_putc('\r');
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}
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davinci_uart_putc(*str++);
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}
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}
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static void rt_hw_console_init(void)
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{
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rt_uint32_t divisor;
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divisor = (24000000 + (BPS * (16 / 2))) / (16 * BPS);
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UART0->ier = 0;
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UART0->lcr = 0x83; //8N1
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UART0->dll = 0;
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UART0->dlh = 0;
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UART0->lcr = 0x03;
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UART0->mcr = 0x03; //RTS,CTS
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UART0->fcr = 0x07; //FIFO
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UART0->lcr = 0x83;
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UART0->dll = divisor & 0xff;
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UART0->dlh = (divisor >> 8) & 0xff;
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UART0->lcr = 0x03;
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UART0->mdr = 0; //16x over-sampling
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UART0->pwremu_mgmt = 0x6000;
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}
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/**
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* This function will init dm365 board
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*/
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void rt_hw_board_init()
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{
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/* initialize console */
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rt_hw_console_init();
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/* initialize mmu */
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rt_hw_mmu_init(dm365_mem_desc, sizeof(dm365_mem_desc)/sizeof(dm365_mem_desc[0]));
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/* initialize hardware interrupt */
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rt_hw_interrupt_init();
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/* initialize the system clock */
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rt_hw_clock_init();
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/* initialize heap memory system */
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#ifdef __CC_ARM
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rt_system_heap_init((void*)&Image$$ER_ZI$$ZI$$Limit, (void*)0x88000000);
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#else
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rt_system_heap_init((void*)&__bss_end, (void*)0x88000000);
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#endif
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/* initialize early device */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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/* initialize timer0 */
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rt_hw_timer_init();
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}
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/*@}*/
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