81 lines
3.3 KiB
C
81 lines
3.3 KiB
C
/*!
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\file gd32f4xx_crc.h
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\brief definitions for the CRC
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\version 2016-08-15, V1.0.0, firmware for GD32F4xx
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\version 2018-12-12, V2.0.0, firmware for GD32F4xx
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\version 2020-09-30, V2.1.0, firmware for GD32F4xx
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*/
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/*
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Copyright (c) 2020, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32F4XX_CRC_H
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#define GD32F4XX_CRC_H
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#include "gd32f4xx.h"
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/* CRC definitions */
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#define CRC CRC_BASE
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/* registers definitions */
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#define CRC_DATA REG32(CRC + 0x00U) /*!< CRC data register */
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#define CRC_FDATA REG32(CRC + 0x04U) /*!< CRC free data register */
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#define CRC_CTL REG32(CRC + 0x08U) /*!< CRC control register */
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/* bits definitions */
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/* CRC_DATA */
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#define CRC_DATA_DATA BITS(0,31) /*!< CRC calculation result bits */
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/* CRC_FDATA */
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#define CRC_FDATA_FDATA BITS(0,7) /*!< CRC free data bits */
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/* CRC_CTL */
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#define CRC_CTL_RST BIT(0) /*!< CRC reset CRC_DATA register bit */
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/* function declarations */
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/* deinit CRC calculation unit */
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void crc_deinit(void);
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/* reset data register(CRC_DATA) to the value of 0xFFFFFFFF */
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void crc_data_register_reset(void);
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/* read the value of the data register */
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uint32_t crc_data_register_read(void);
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/* read the value of the free data register */
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uint8_t crc_free_data_register_read(void);
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/* write data to the free data register */
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void crc_free_data_register_write(uint8_t free_data);
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/* calculate the CRC value of a 32-bit data */
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uint32_t crc_single_data_calculate(uint32_t sdata);
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/* calculate the CRC value of an array of 32-bit values */
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uint32_t crc_block_data_calculate(uint32_t array[], uint32_t size);
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#endif /* GD32F4XX_CRC_H */
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