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linyuanbo_breo_server 0e28321c2c feat : n32g452xx direct structure base at32
1. 重新整理目录结构
2021-08-14 09:17:51 +00:00

46 lines
1.0 KiB
C
Executable File

/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
#include <n32g45x.h>
// <o> Internal SRAM memory size[Kbytes]
// <i>Default: 80
#ifdef __ICCARM__
// Use *.icf ram symbal, to avoid hardcode.
extern char __ICFEDIT_region_RAM_end__;
#define N32_SRAM_END &__ICFEDIT_region_RAM_end__
#else
#define N32_SRAM_SIZE 80
#define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024)
#endif
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define HEAP_BEGIN (&__bss_end)
#endif
#define HEAP_END N32_SRAM_END
void rt_hw_board_init(void);
#endif
//*** <<< end of configuration section >>> ***