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123ed1be1b
RISCV_S_MODE configuration only affects the code in libcpu/risc-v/virt64, and the only bsp using this libcpu is qemu-virt64-riscv. Considering s-mode is the default mode RT-Thread running on virt64 machine, it seems unnecessary to make RISCV_S_MODE a Kconfig option. Solution: Remove RISCV_S_MODE from Kconfig and define it as a macro in the code in libcpu/risc-v/virt64. Plus, due to this macro is only related to virt64, rename RISCV_S_MODE to RISCV_VIRT64_S_MODE. Update the .config/rtconfig.h in this patch. Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
81 lines
2.9 KiB
C
81 lines
2.9 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-05-20 bigmagic first version
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* 2021-10-20 bernard fix s-mode issue
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*/
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#ifndef __PLIC_H__
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#define __PLIC_H__
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#include <rtconfig.h>
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#include <rthw.h>
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#define PLIC_PRIORITY_BASE 0x0
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#define PLIC_PENDING_BASE 0x1000
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#define PLIC_ENABLE_BASE 0x2000
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#define PLIC_CONTEXT_BASE 0x200000
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extern size_t plic_base;
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#define VIRT_PLIC_BASE (plic_base)
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#define PLIC_PRIORITY_OFFSET (0x0)
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#define PLIC_PENDING_OFFSET (0x1000)
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#define PLIC_ENABLE_STRIDE 0x80
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#define PLIC_CONTEXT_STRIDE 0x1000
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/* RT-Thread runs in S-mode on virt64 by default */
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#define RISCV_VIRT64_S_MODE
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#ifndef RISCV_VIRT64_S_MODE
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#define PLIC_MENABLE_OFFSET (0x2000)
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#define PLIC_MTHRESHOLD_OFFSET (0x200000)
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#define PLIC_MCLAIM_OFFSET (0x200004)
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#define PLIC_MCOMPLETE_OFFSET (0x200004)
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#define PLIC_ENABLE(hart) (VIRT_PLIC_BASE + PLIC_MENABLE_OFFSET + (hart * 2) * PLIC_ENABLE_STRIDE)
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#define PLIC_THRESHOLD(hart) (VIRT_PLIC_BASE + PLIC_MTHRESHOLD_OFFSET + (hart * 2) * PLIC_CONTEXT_STRIDE)
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#define PLIC_CLAIM(hart) (VIRT_PLIC_BASE + PLIC_MCLAIM_OFFSET + (hart * 2) * PLIC_CONTEXT_STRIDE)
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#define PLIC_COMPLETE(hart) (VIRT_PLIC_BASE + PLIC_MCOMPLETE_OFFSET + (hart * 2) * PLIC_CONTEXT_STRIDE)
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#else
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#define PLIC_SENABLE_OFFSET (0x2000 + PLIC_ENABLE_STRIDE)
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#define PLIC_STHRESHOLD_OFFSET (0x200000 + PLIC_CONTEXT_STRIDE)
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#define PLIC_SCLAIM_OFFSET (0x200004 + PLIC_CONTEXT_STRIDE)
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#define PLIC_SCOMPLETE_OFFSET (0x200004 + PLIC_CONTEXT_STRIDE)
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#define PLIC_ENABLE(hart) (VIRT_PLIC_BASE + PLIC_SENABLE_OFFSET + (hart * 2) * PLIC_ENABLE_STRIDE)
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#define PLIC_THRESHOLD(hart) (VIRT_PLIC_BASE + PLIC_STHRESHOLD_OFFSET + (hart * 2) * PLIC_CONTEXT_STRIDE)
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#define PLIC_CLAIM(hart) (VIRT_PLIC_BASE + PLIC_SCLAIM_OFFSET + (hart * 2) * PLIC_CONTEXT_STRIDE)
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#define PLIC_COMPLETE(hart) (VIRT_PLIC_BASE + PLIC_SCOMPLETE_OFFSET + (hart * 2) * PLIC_CONTEXT_STRIDE)
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#endif
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#define PLIC_PRIORITY(id) (VIRT_PLIC_BASE + PLIC_PRIORITY_OFFSET + (id) * 4)
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#define PLIC_PENDING(id) (VIRT_PLIC_BASE + PLIC_PENDING_OFFSET + ((id) / 32))
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#define WORD_CNT_BYTE (1024 / 8)
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/* IRQ config in system, max 1024 (from 0 to 1023) */
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#define CONFIG_IRQ_NR (128)
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#define CONFIG_IRQ_WORD (CONFIG_IRQ_NR / 32)
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void plic_set_priority(int irq, int priority);
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void plic_irq_enable(int irq);
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void plic_irq_disable(int irq);
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void plic_set_threshold(int mthreshold);
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int plic_claim(void);
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void plic_complete(int irq);
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void plic_set_thresh(rt_uint32_t val);
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void plic_set_ie(rt_uint32_t word_index,rt_uint32_t val);
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void plic_init();
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void plic_handle_irq(void);
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#endif
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