187 lines
4.2 KiB
Plaintext
187 lines
4.2 KiB
Plaintext
/* Linker script to configure memory regions.
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* Need modifying for a specific board.
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* FLASH.ORIGIN: starting address of flash
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* FLASH.LENGTH: length of flash
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* RAM.ORIGIN: starting address of RAM bank 0
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* RAM.LENGTH: length of RAM bank 0
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*/
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x8010100, LENGTH = 959K /* 960K-256B */
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RAM (rw) : ORIGIN = 0x20000000, LENGTH = 0x28000 /* 160K */
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RAM2 (rw) : ORIGIN = 0x20028000, LENGTH = 0x14000 /* 80K */
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __copy_table_start__
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* __copy_table_end__
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* __zero_table_start__
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* __zero_table_end__
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_stext = .;
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KEEP(*(.isr_vector))
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. = ALIGN(4);
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t*)
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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. = ALIGN(4);
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__rtatcmdtab_start = .;
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KEEP(*(RtAtCmdTab))
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__rtatcmdtab_end = .;
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. = ALIGN(4);
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. = ALIGN(4);
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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. = ALIGN(4);
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__data_start__ = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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KEEP(*(.jcr*))
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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.stack_dummy (COPY):
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{
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. = ALIGN(8);
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__stack_start__ = .;
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*(.stack*)
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__stack_end__ = .;
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} > RAM
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._bss :
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{
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. = ALIGN(8);
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__bss2_start__ = .;
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__bss2_end__ = .;
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} > RAM2
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.bss __stack_end__ :
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{
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. = ALIGN(4);
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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} > RAM
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ASSERT(__StackTop <= 0x20028000, "stack address error")
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}
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