184 lines
4.2 KiB
C
184 lines
4.2 KiB
C
/*
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* Copyright (c) 2006-2019, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018/5/3 Bernard first version
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* 2019-07-28 zdzn add smp support
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* 2019-08-09 zhangjun fixup the problem of smp startup and scheduling issues,
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* write addr to mailbox3 to startup smp, and we use mailbox0 for ipi
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "cp15.h"
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#include "armv8.h"
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#include <board.h>
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#define MAX_HANDLERS 72
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#ifdef RT_USING_SMP
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#define rt_interrupt_nest rt_cpu_self()->irq_nest
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#else
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extern volatile rt_uint8_t rt_interrupt_nest;
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#endif
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extern int system_vectors;
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/* exception and interrupt handler table */
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struct rt_irq_desc isr_table[MAX_HANDLERS];
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rt_ubase_t rt_interrupt_from_thread;
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rt_ubase_t rt_interrupt_to_thread;
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rt_ubase_t rt_thread_switch_interrupt_flag;
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void rt_hw_vector_init(void)
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{
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rt_hw_set_current_vbar((rt_ubase_t)&system_vectors); // cpu_gcc.S
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}
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static void default_isr_handler(int vector, void *param)
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{
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#ifdef RT_USING_SMP
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rt_kprintf("cpu %d unhandled irq: %d\n", rt_hw_cpu_id(),vector);
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#else
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rt_kprintf("unhandled irq: %d\n",vector);
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#endif
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}
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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rt_uint32_t index;
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/* mask all of interrupts */
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IRQ_DISABLE_BASIC = 0x000000ff;
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IRQ_DISABLE1 = 0xffffffff;
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IRQ_DISABLE2 = 0xffffffff;
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for (index = 0; index < MAX_HANDLERS; index ++)
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{
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isr_table[index].handler = default_isr_handler;
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isr_table[index].param = NULL;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_strncpy(isr_table[index].name, "unknown", RT_NAME_MAX);
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isr_table[index].counter = 0;
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#endif
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}
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int vector)
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{
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if (vector < 32)
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{
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IRQ_DISABLE1 = (1 << vector);
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}
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else if (vector<64)
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{
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vector = vector % 32;
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IRQ_DISABLE2 = (1 << vector);
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}
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else
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{
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vector = vector - 64;
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IRQ_DISABLE_BASIC = (1 << vector);
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}
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int vector)
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{
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if (vector < 32)
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{
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IRQ_ENABLE1 = (1 << vector);
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}
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else if (vector < 64)
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{
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vector = vector % 32;
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IRQ_ENABLE2 = (1 << vector);
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}
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else
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{
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vector = vector - 64;
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IRQ_ENABLE_BASIC = (1 << vector);
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}
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param new_handler the interrupt service routine to be installed
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* @param old_handler the old interrupt service routine
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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void *param, const char *name)
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if (vector < MAX_HANDLERS)
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{
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old_handler = isr_table[vector].handler;
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if (handler != RT_NULL)
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{
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#ifdef RT_USING_INTERRUPT_INFO
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rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
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#endif /* RT_USING_INTERRUPT_INFO */
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isr_table[vector].handler = handler;
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isr_table[vector].param = param;
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}
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}
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return old_handler;
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}
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#ifdef RT_USING_SMP
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void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask)
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{
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__DSB();
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if(cpu_mask & 0x1)
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{
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send_ipi_msg(0, ipi_vector);
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}
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if(cpu_mask & 0x2)
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{
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send_ipi_msg(1, ipi_vector);
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}
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if(cpu_mask & 0x4)
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{
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send_ipi_msg(2, ipi_vector);
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}
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if(cpu_mask & 0x8)
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{
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send_ipi_msg(3, ipi_vector);
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}
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__DSB();
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}
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#endif
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#ifdef RT_USING_SMP
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void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler)
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{
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/* note: ipi_vector maybe different with irq_vector */
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rt_hw_interrupt_install(ipi_vector, ipi_isr_handler, 0, "IPI_HANDLER");
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}
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#endif
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