140 lines
3.5 KiB
C
140 lines
3.5 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-29 zdzn first version
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* 2021-07-31 GuEe-GUI config the memory/io address map
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* 2021-09-11 GuEe-GUI remove do-while in rt_hw_timer_isr
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* 2021-12-28 GuEe-GUI add smp support
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#include <mmu.h>
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#include <gic.h>
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#include <gicv3.h>
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#include <psci.h>
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#include <gtimer.h>
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#include <cpuport.h>
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#include <interrupt.h>
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#include "drv_uart.h"
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struct mem_desc platform_mem_desc[] =
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{
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{0x40000000, 0x80000000, 0x40000000, NORMAL_MEM},
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{PL031_RTC_BASE, PL031_RTC_BASE + 0x1000, PL031_RTC_BASE, DEVICE_MEM},
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{PL011_UART0_BASE, PL011_UART0_BASE + 0x1000, PL011_UART0_BASE, DEVICE_MEM},
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{VIRTIO_MMIO_BASE, VIRTIO_MMIO_BASE + VIRTIO_MAX_NR * VIRTIO_MMIO_SIZE, VIRTIO_MMIO_BASE, DEVICE_MEM},
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#ifdef BSP_USING_GICV2
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{GIC_PL390_DISTRIBUTOR_PPTR, GIC_PL390_DISTRIBUTOR_PPTR + 0x1000, GIC_PL390_DISTRIBUTOR_PPTR, DEVICE_MEM},
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#endif
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#ifdef BSP_USING_GICV3
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{GIC_PL500_DISTRIBUTOR_PPTR, GIC_PL500_DISTRIBUTOR_PPTR + 0x1000, GIC_PL500_DISTRIBUTOR_PPTR, DEVICE_MEM},
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{GIC_PL500_REDISTRIBUTOR_PPTR, GIC_PL500_REDISTRIBUTOR_PPTR + 0xf60000, GIC_PL500_REDISTRIBUTOR_PPTR, DEVICE_MEM},
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#endif
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};
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const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc)/sizeof(platform_mem_desc[0]);
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void idle_wfi(void)
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{
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asm volatile ("wfi");
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}
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/**
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* Initialize the Hardware related stuffs. Called from rtthread_startup()
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* after interrupt disabled.
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*/
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void rt_hw_board_init(void)
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{
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rt_hw_init_mmu_table(platform_mem_desc, platform_mem_desc_size);
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rt_hw_mmu_init();
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/* initialize hardware interrupt */
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rt_hw_interrupt_init();
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/* initialize uart */
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rt_hw_uart_init();
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/* initialize timer for os tick */
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rt_hw_gtimer_init();
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rt_thread_idle_sethook(idle_wfi);
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arm_psci_init(PSCI_METHOD_HVC, RT_NULL, RT_NULL);
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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/* set console device */
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_HEAP
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/* initialize memory system */
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rt_kprintf("heap: [0x%08x - 0x%08x]\n", RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
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rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
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#endif
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#ifdef RT_USING_SMP
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/* install IPI handle */
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rt_hw_ipi_handler_install(RT_SCHEDULE_IPI, rt_scheduler_ipi_handler);
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arm_gic_umask(0, IRQ_ARM_IPI_KICK);
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#endif
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}
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void poweroff(void)
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{
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arm_psci_system_off();
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}
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MSH_CMD_EXPORT(poweroff, poweroff...);
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void reboot(void)
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{
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arm_psci_system_reboot();
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}
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MSH_CMD_EXPORT(reboot, reboot...);
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#ifdef RT_USING_SMP
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void rt_hw_secondary_cpu_up(void)
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{
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int i;
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extern void secondary_cpu_start(void);
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extern rt_uint64_t rt_cpu_mpidr_early[];
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for (i = 1; i < RT_CPUS_NR; ++i)
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{
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arm_psci_cpu_on(rt_cpu_mpidr_early[i], (uint64_t)(secondary_cpu_start));
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}
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}
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void secondary_cpu_c_start(void)
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{
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rt_hw_mmu_init();
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rt_hw_spin_lock(&_cpus_lock);
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arm_gic_cpu_init(0, platform_get_gic_cpu_base());
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#ifdef BSP_USING_GICV3
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arm_gic_redist_init(0, platform_get_gic_redist_base());
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#endif
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rt_hw_vector_init();
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rt_hw_gtimer_local_enable();
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arm_gic_umask(0, IRQ_ARM_IPI_KICK);
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rt_kprintf("\rcall cpu %d on success\n", rt_hw_cpu_id());
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rt_system_scheduler_start();
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}
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void rt_hw_secondary_cpu_idle_exec(void)
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{
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__WFE();
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}
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#endif
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