660 lines
17 KiB
C
660 lines
17 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-03-18 Carl the first version
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*/
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#include "drv_sdctrl.h"
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#include "ft_sdctrl_hw.h"
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#include "ft_sdctrl.h"
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#include "ft_debug.h"
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#include "ft_types.h"
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#include "ft_generic_timer.h"
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#include <drivers/mmcsd_core.h>
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#include "interrupt.h"
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#include "rtconfig.h"
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#include "ft_cache.h"
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#ifdef BSP_USING_SDC
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#define LOG_TAG "drv.sdmmc"
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#include <drv_log.h>
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#define RTHW_SDCTRL_LOCK(_sdctrl) rt_mutex_take(&_sdctrl->mutex, RT_WAITING_FOREVER)
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#define RTHW_SDCTRL_UNLOCK(_sdctrl) rt_mutex_release(&_sdctrl->mutex);
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struct mmcsd_pkg
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{
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struct rt_mmcsd_cmd *cmd;
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void *buff;
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rt_uint32_t flag;
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};
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typedef struct
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{
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FtsdCtrl_t ft_sdctrl;
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struct rt_mmcsd_host *host;
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struct rt_event event;
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struct rt_mutex mutex;
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struct mmcsd_pkg *pkg;
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} ft_sdctrl_class_t;
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ft_sdctrl_class_t sdctrl_class;
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rt_align(SDCTR_ALIGN_LEN)
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static rt_uint8_t cache_buf[SDCTR_BUFF_SIZE];
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static void rthw_sdctrl_send_command(ft_sdctrl_class_t *class_p, struct mmcsd_pkg *pkg);
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static void demo_dump_sdc(void)
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{
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Ft_DumpHexWord((const rt_uint32_t *)(0x28207C00), 256);
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}
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MSH_CMD_EXPORT_ALIAS(demo_dump_sdc, dump_sdc, output all dump_sdc);
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static void rthw_sdctrl_delay(u32 delayCnt)
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{
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Ft_GenericTimer_UsDelay(delayCnt);
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}
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static u32 rthw_sdctrl_rasp2type(u32 rasp)
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{
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switch (rasp)
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{
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case RESP_NONE:
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return FTSDCTRL_CMD_RES_NONE;
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case RESP_R2:
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return FTSDCTRL_CMD_RES_LONG;
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default:
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return FTSDCTRL_CMD_RES_SHORT;
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}
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return FTSDCTRL_CMD_RES_SHORT;
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}
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static void rthw_sdctrl_transfer_by_dma(ft_sdctrl_class_t *class_p, struct mmcsd_pkg *pkg)
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{
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struct rt_mmcsd_data *data;
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struct rt_mmcsd_cmd *cmd;
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u32 rasp;
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u32 *buff;
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FtsdCtrl_t *ft_sdctrl_p;
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if ((RT_NULL == class_p))
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{
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LOG_E("rthw_sdctrl_transfer_by_dma invalid class_p");
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return;
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}
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ft_sdctrl_p = &class_p->ft_sdctrl;
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if ((RT_NULL == pkg))
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{
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LOG_E("rthw_sdctrl_transfer_by_dma invalid args");
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return;
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}
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data = pkg->cmd->data;
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if (RT_NULL == data)
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{
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LOG_E("rthw_sdctrl_transfer_by_dma invalid args");
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return;
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}
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buff = pkg->buff;
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if (RT_NULL == buff)
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{
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LOG_E("rthw_sdctrl_transfer_by_dma invalid args");
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return;
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}
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cmd = pkg->cmd;
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rasp = resp_type(pkg->cmd);
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rasp = rthw_sdctrl_rasp2type(rasp);
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if (data->flags & DATA_DIR_WRITE)
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{
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#ifdef BSP_SDC_DEBUG_PRINT
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rt_kprintf("DATA_DIR_WRITE %x \r\n", cmd->arg);
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#endif
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FCache_cpuDcacheClean(buff, data->blks * data->blksize);
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/* data, card, blk: card : data + blk */
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FSdCtrl_WriteData(ft_sdctrl_p, (UINTPTR)buff, cmd->arg, data->blks);
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cmd->err = FSdCtrl_WaitCmdEnd(ft_sdctrl_p, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay, rasp, cmd->resp);
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#ifdef BSP_SDC_DEBUG_PRINT
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for (int i = 0; i < 4; i++)
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{
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rt_kprintf("cmdRsp[%d] %x \r\n", i, cmd->resp[i]);
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}
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Ft_DumpHexWord(buff, 256);
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#endif
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FSdCtrl_WaitWriteDataEnd(ft_sdctrl_p, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay, data->blks);
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FCache_cpuDcacheInvalidate(buff, data->blks * data->blksize);
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}
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else if (data->flags & DATA_DIR_READ)
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{
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#ifdef BSP_SDC_DEBUG_PRINT
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rt_kprintf("DATA_DIR_READ %x \r\n", cmd->arg);
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#endif
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if ((cmd->flags & CMD_ADTC) && (data->blksize < 512))
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{
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#ifdef BSP_SDC_DEBUG_PRINT
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LOG_E("CMD_ADTC \r\n");
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#endif
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FSdCtrl_DoACmd(ft_sdctrl_p, cmd->cmd_code, rasp, cmd->arg);
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rt_thread_mdelay(10);
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}
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FCache_cpuDcacheInvalidate(buff, data->blks * data->blksize);
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FSdCtrl_ReadData(ft_sdctrl_p, (UINTPTR)buff, cmd->arg, data->blks);
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cmd->err = FSdCtrl_WaitCmdEnd(ft_sdctrl_p, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay, rasp, cmd->resp);
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#ifdef BSP_SDC_DEBUG_PRINT
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for (int i = 0; i < 4; i++)
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{
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rt_kprintf("cmdRsp[%d] %x \r\n", i, cmd->resp[i]);
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}
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#endif
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FSdCtrl_WaitReadDataEnd(ft_sdctrl_p, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay, data->blks);
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FCache_cpuDcacheClean(buff, data->blks * data->blksize);
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#ifdef BSP_SDC_DEBUG_PRINT
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Ft_DumpHexWord(buff, data->blks * data->blksize);
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#endif
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}
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}
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static void rthw_sdctrl_docmd(ft_sdctrl_class_t *class_p, struct mmcsd_pkg *pkg)
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{
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struct rt_mmcsd_cmd *cmd;
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u32 rasp;
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FtsdCtrl_t *ft_sdctrl_p;
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if ((RT_NULL == class_p))
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{
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LOG_E("rthw_sdctrl_docmd invalid class_p");
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return;
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}
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ft_sdctrl_p = &class_p->ft_sdctrl;
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if ((RT_NULL == pkg))
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{
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LOG_E("rthw_sdctrl_docmd invalid args");
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return;
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}
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cmd = pkg->cmd;
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rasp = resp_type(pkg->cmd);
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rasp = rthw_sdctrl_rasp2type(rasp);
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FSdCtrl_DoCmd(ft_sdctrl_p, pkg->cmd->cmd_code, rasp, cmd->arg);
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cmd->err = FSdCtrl_WaitCmdEnd(ft_sdctrl_p, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay, rasp, cmd->resp);
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#ifdef BSP_SDC_DEBUG_PRINT
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for (int i = 0; i < 4; i++)
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{
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rt_kprintf("cmdRsp[%d] %x \r\n", i, cmd->resp[i]);
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}
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#endif
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}
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static void rthw_sdctrl_send_command(ft_sdctrl_class_t *class_p, struct mmcsd_pkg *pkg)
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{
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struct rt_mmcsd_cmd *cmd = pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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/* save pkg */
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class_p->pkg = pkg;
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/* config data reg */
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if (data != RT_NULL && data->blks)
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{
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/* transfer config */
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rthw_sdctrl_transfer_by_dma(class_p, pkg);
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}
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else
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{
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rthw_sdctrl_docmd(class_p, pkg);
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}
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}
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/**
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* @brief This function send sdio request.
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* @param host rt_mmcsd_host
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* @param req request
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* @retval None
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*/
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static void rthw_sdctrl_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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struct mmcsd_pkg pkg;
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ft_sdctrl_class_t *class_p = host->private_data;
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struct rt_mmcsd_data *data;
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RTHW_SDCTRL_LOCK(class_p);
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if (req->cmd != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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data = req->cmd->data;
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pkg.cmd = req->cmd;
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if (pkg.cmd->cmd_code == 5 || pkg.cmd->cmd_code == 1)
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{
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rt_kprintf("cmd_code is not vaild %x \r\n", pkg.cmd->cmd_code);
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pkg.cmd->err = RT_EINVAL;
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goto _exit;
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}
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#ifdef BSP_SDC_DEBUG_PRINT
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struct rt_mmcsd_cmd *cmd;
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cmd = req->cmd;
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LOG_E("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d",
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cmd->cmd_code,
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cmd->arg,
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resp_type(cmd) == RESP_NONE ? "NONE" : "",
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resp_type(cmd) == RESP_R1 ? "R1" : "",
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resp_type(cmd) == RESP_R1B ? "R1B" : "",
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resp_type(cmd) == RESP_R2 ? "R2" : "",
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resp_type(cmd) == RESP_R3 ? "R3" : "",
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resp_type(cmd) == RESP_R4 ? "R4" : "",
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resp_type(cmd) == RESP_R5 ? "R5" : "",
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0);
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#endif
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if (data != RT_NULL)
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{
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rt_uint32_t size = data->blks * data->blksize;
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RT_ASSERT(size <= SDCTR_BUFF_SIZE);
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pkg.buff = data->buf;
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if ((rt_uint32_t)data->buf & (SDCTR_ALIGN_LEN - 1))
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{
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pkg.buff = cache_buf;
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if (data->flags & DATA_DIR_WRITE)
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{
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rt_memcpy(cache_buf, data->buf, size);
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}
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}
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}
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rthw_sdctrl_send_command(class_p, &pkg);
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if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDCTR_ALIGN_LEN - 1)))
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{
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rt_memcpy(data->buf, cache_buf, data->blksize * data->blks);
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}
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}
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if (req->stop != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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pkg.cmd = req->stop;
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rthw_sdctrl_send_command(class_p, &pkg);
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}
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_exit:
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RTHW_SDCTRL_UNLOCK(class_p);
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mmcsd_req_complete(class_p->host);
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}
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static void rthw_sdctrl_clk_divider(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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ft_sdctrl_class_t *class_p = host->private_data;
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FtsdCtrl_t *sd_ctrl = &(class_p->ft_sdctrl);
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/* bus mode is pull push */
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FSdCtrl_ClkFreqSetup(sd_ctrl, io_cfg->clock);
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return;
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}
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static void rthw_sdctrl_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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ft_sdctrl_class_t *class_p = host->private_data;
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RTHW_SDCTRL_LOCK(class_p);
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/* calculate and set clk divider */
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rthw_sdctrl_clk_divider(host, io_cfg);
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RTHW_SDCTRL_UNLOCK(class_p);
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}
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rt_int32_t rthw_sdctrl_detect(struct rt_mmcsd_host *host)
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{
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ft_sdctrl_class_t *class_p = host->private_data;
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return FSdCtrl_CardDetect(&class_p->ft_sdctrl);
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}
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static const struct rt_mmcsd_host_ops ops =
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{
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rthw_sdctrl_request,
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rthw_sdctrl_iocfg,
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rthw_sdctrl_detect,
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RT_NULL,
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};
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void rthw_sdctrl_nomarl_callback(void *args)
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{
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FtsdCtrl_t *pFtsdCtrl = (FtsdCtrl_t *)args;
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rt_uint32_t status;
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ft_sdctrl_class_t *class_p;
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if (RT_NULL == pFtsdCtrl)
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{
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return;
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}
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class_p = rt_container_of(pFtsdCtrl, ft_sdctrl_class_t, ft_sdctrl);
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status = FSdCtrl_GetNormalIrqStatus(pFtsdCtrl);
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if (status & NORMAL_INT_STATUS_CR)
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{
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rt_event_send(&class_p->event, SDCTR_CARD_REMOVE_FLG);
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}
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else if (status & NORMAL_INT_STATUS_CC)
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{
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rt_event_send(&class_p->event, SDCTR_CMD_IS_COMPLETE_FLG);
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}
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else if (status & NORMAL_INT_STATUS_EI)
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{
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rt_event_send(&class_p->event, SDCTR_CMD_IS_ERROR_FLG);
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}
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return;
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}
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void rthw_sdctrl_dma_callback(void *args)
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{
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FtsdCtrl_t *pFtsdCtrl = (FtsdCtrl_t *)args;
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rt_uint32_t status;
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ft_sdctrl_class_t *class_p;
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if (RT_NULL == pFtsdCtrl)
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{
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return;
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}
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class_p = rt_container_of(pFtsdCtrl, ft_sdctrl_class_t, ft_sdctrl);
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status = FSdCtrl_GetDataIrqStatus(pFtsdCtrl);
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if (status & BD_ISR_REG_TRS)
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{
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/* send write complete event */
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rt_event_send(&class_p->event, SDCTR_WRITE_IS_COMPLETE_FLG);
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}
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if (status & BD_ISR_REG_RESPE)
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{
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/* send read complete event */
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rt_event_send(&class_p->event, SDCTR_READ_IS_COMPLETE_FLG);
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}
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if (status & BD_ISR_REG_DAIS)
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{
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/* send dma errror event */
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rt_event_send(&class_p->event, SDCTR_DMA_IS_ERROR_FLG);
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}
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}
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void rthw_sdctrl_error_callback(void *args)
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{
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FtsdCtrl_t *pFtsdCtrl = (FtsdCtrl_t *)args;
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rt_uint32_t status;
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ft_sdctrl_class_t *class_p;
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if (RT_NULL == pFtsdCtrl)
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{
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return;
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}
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class_p = rt_container_of(pFtsdCtrl, ft_sdctrl_class_t, ft_sdctrl);
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status = FSdCtrl_GetErrorIrqStatus(pFtsdCtrl);
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if (status & SDCTR_CMD_TIMEOUT_FLG)
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{
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rt_event_send(&class_p->event, SDCTR_CMD_TIMEOUT_FLG);
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}
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if (status & ERROR_INT_EN_CNR)
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{
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rt_event_send(&class_p->event, SDCTR_CMD_RECEIVE_IS_ERROR_FLG);
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}
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if (status & ERROR_INT_EN_CCRCE)
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{
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rt_event_send(&class_p->event, SDCTR_CMD_CRC_IS_ERROR_FLG);
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}
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}
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void rthw_sdctrl_normal_irq(int vector, void *param)
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{
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FtsdCtrl_t *pFtsdCtrl = (FtsdCtrl_t *)param;
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FSdCtrl_NormalIrq(pFtsdCtrl);
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}
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void rthw_sdctrl_dma_irq(int vector, void *param)
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{
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FtsdCtrl_t *pFtsdCtrl = (FtsdCtrl_t *)param;
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FSdCtrl_DmaIrq(pFtsdCtrl);
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}
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void rthw_sdctrl_err_irq(int vector, void *param)
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{
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FtsdCtrl_t *pFtsdCtrl = (FtsdCtrl_t *)param;
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FSdCtrl_ErrIrq(pFtsdCtrl);
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}
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ft_error_t rthw_sdctrl_cmd_wait(FtsdCtrl_t *pFtsdCtrl)
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{
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rt_uint32_t status;
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ft_sdctrl_class_t *class_p;
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if (RT_NULL == pFtsdCtrl)
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{
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return FTSDC_INVALID_PARAM;
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}
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class_p = rt_container_of(pFtsdCtrl, ft_sdctrl_class_t, ft_sdctrl);
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if (rt_event_recv(&class_p->event, SDCTR_CMD_IS_COMPLETE_FLG | SDCTR_CMD_IS_ERROR_FLG | SDCTR_CMD_CRC_IS_ERROR_FLG, RT_EVENT_FLAG_CLEAR | RT_EVENT_FLAG_OR,
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rt_tick_from_millisecond(50000), &status) != RT_EOK)
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{
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/* wait cmd completed timeout */
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LOG_E("wait cmd completed timeout");
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return FTSDC_TIMEOUT;
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}
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if (SDCTR_CMD_IS_COMPLETE_FLG == (status & SDCTR_CMD_IS_COMPLETE_FLG))
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{
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return FTSDC_SUCCESS;
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}
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else
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{
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LOG_E("wait cmd is error %x ", status);
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return FTSDC_FAILURE;
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}
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}
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ft_error_t rthw_sdctrl_read_wait(FtsdCtrl_t *pFtsdCtrl)
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{
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rt_uint32_t status;
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ft_sdctrl_class_t *class_p;
|
|
|
|
if (RT_NULL == pFtsdCtrl)
|
|
{
|
|
return FTSDC_INVALID_PARAM;
|
|
}
|
|
|
|
class_p = rt_container_of(pFtsdCtrl, ft_sdctrl_class_t, ft_sdctrl);
|
|
|
|
if (rt_event_recv(&class_p->event, SDCTR_READ_IS_COMPLETE_FLG | SDCTR_CMD_RECEIVE_IS_ERROR_FLG,
|
|
RT_EVENT_FLAG_CLEAR | RT_EVENT_FLAG_OR,
|
|
rt_tick_from_millisecond(50000), &status) != RT_EOK)
|
|
{
|
|
/* wait read completed timeout */
|
|
LOG_E("wait read completed timeout");
|
|
return FTSDC_TIMEOUT;
|
|
}
|
|
|
|
if (SDCTR_READ_IS_COMPLETE_FLG == (status & SDCTR_READ_IS_COMPLETE_FLG))
|
|
{
|
|
return FTSDC_SUCCESS;
|
|
}
|
|
else
|
|
{
|
|
LOG_E("wait read is error %x ", status);
|
|
return FTSDC_FAILURE;
|
|
}
|
|
}
|
|
|
|
ft_error_t rthw_sdctrl_write_wait(FtsdCtrl_t *pFtsdCtrl)
|
|
{
|
|
rt_uint32_t status;
|
|
ft_sdctrl_class_t *class_p;
|
|
|
|
if (RT_NULL == pFtsdCtrl)
|
|
{
|
|
return FTSDC_INVALID_PARAM;
|
|
}
|
|
|
|
class_p = rt_container_of(pFtsdCtrl, ft_sdctrl_class_t, ft_sdctrl);
|
|
|
|
if (rt_event_recv(&class_p->event, SDCTR_WRITE_IS_COMPLETE_FLG, RT_EVENT_FLAG_CLEAR | RT_EVENT_FLAG_OR,
|
|
rt_tick_from_millisecond(50000), &status) != RT_EOK)
|
|
{
|
|
/* wait write completed timeout */
|
|
LOG_E("wait write completed timeout");
|
|
return FTSDC_TIMEOUT;
|
|
}
|
|
|
|
if (SDCTR_WRITE_IS_COMPLETE_FLG == (status & SDCTR_WRITE_IS_COMPLETE_FLG))
|
|
{
|
|
return FTSDC_SUCCESS;
|
|
}
|
|
else
|
|
{
|
|
LOG_E("wait write is error %x ", status);
|
|
return FTSDC_FAILURE;
|
|
}
|
|
}
|
|
|
|
static rt_err_t rthw_sdctrl_create(ft_sdctrl_class_t *class_p)
|
|
{
|
|
struct rt_mmcsd_host *host;
|
|
|
|
host = mmcsd_alloc_host();
|
|
if (host == RT_NULL)
|
|
{
|
|
LOG_E("L:%d F:%s mmcsd alloc host fail");
|
|
return RT_ENOMEM;
|
|
}
|
|
|
|
class_p->ft_sdctrl.config = *(FSdCtrl_Config_t *)FSdCtrl_LookupConfig(0);
|
|
rt_event_init(&class_p->event, "sdctrl", RT_IPC_FLAG_FIFO);
|
|
rt_mutex_init(&class_p->mutex, "sdctrl", RT_IPC_FLAG_PRIO);
|
|
|
|
class_p->host = host;
|
|
host->ops = &ops;
|
|
/* range of sd work speed */
|
|
host->freq_min = 400 * 1000;
|
|
host->freq_max = 48 * 1000000;
|
|
host->valid_ocr = 0X00FFFF80; /* The voltage range supported is 1.65v-3.6v */
|
|
host->flags = MMCSD_BUSWIDTH_4;
|
|
host->private_data = class_p;
|
|
/* ready to change */
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
int rthw_sdctrl_init(void)
|
|
{
|
|
|
|
FtsdCtrl_t *ft_sdctrl_p;
|
|
#ifdef BSP_SDC_USE_IRQ
|
|
FSdCtrl_Config_t *config_p;
|
|
FSdCtrl_NormalIrqSelect_t normalIrqFlgs = 0;
|
|
#endif
|
|
|
|
rt_kprintf("rthw_sdctrl_init \r\n");
|
|
RT_ASSERT(rthw_sdctrl_create(&sdctrl_class) == RT_EOK);
|
|
ft_sdctrl_p = &sdctrl_class.ft_sdctrl;
|
|
|
|
FSdCtrl_Reset(ft_sdctrl_p, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay);
|
|
FsdCtrl_Init(ft_sdctrl_p);
|
|
|
|
#ifdef BSP_SDC_USE_IRQ
|
|
config_p = &ft_sdctrl_p->config;
|
|
#ifdef BSP_SDC_IRQ_CARD_REMOVE
|
|
normalIrqFlgs |= NORMAL_IRQ_CR;
|
|
|
|
#endif
|
|
normalIrqFlgs |= NORMAL_IRQ_CC;
|
|
/* register handler、irq enable bit and wait callback */
|
|
FSdCtrl_SetHandler(ft_sdctrl_p, FTSDCTRL_CMDIRQID, rthw_sdctrl_nomarl_callback, ft_sdctrl_p);
|
|
FSdCtrl_NormalIrqSet(ft_sdctrl_p, normalIrqFlgs);
|
|
FSdCtrl_CmdWaitRegister(ft_sdctrl_p, rthw_sdctrl_cmd_wait);
|
|
|
|
FSdCtrl_SetHandler(ft_sdctrl_p, FTSDCTRL_DMADATAIRQID, rthw_sdctrl_dma_callback, ft_sdctrl_p);
|
|
FSdCtrl_BdIrqSet(ft_sdctrl_p, BD_IRQ_TRS | BD_IRQ_RESPE);
|
|
FSdCtrl_WriteWaitRegister(ft_sdctrl_p, rthw_sdctrl_write_wait);
|
|
FSdCtrl_ReadWaitRegister(ft_sdctrl_p, rthw_sdctrl_read_wait);
|
|
|
|
config_p->workMode = FTSDCTRL_CMD_IRQ_MASK | FTSDCTRL_DATA_WRITE_IRQ_MASK | FTSDCTRL_DATA_READ_IRQ_MASK;
|
|
|
|
#else
|
|
|
|
#endif
|
|
|
|
/* install normal irq */
|
|
|
|
rt_hw_interrupt_install(ft_sdctrl_p->config.normalIrqNum, rthw_sdctrl_normal_irq,
|
|
&sdctrl_class.ft_sdctrl, "normalIrq");
|
|
rt_hw_interrupt_umask(ft_sdctrl_p->config.normalIrqNum);
|
|
|
|
rt_hw_interrupt_install(ft_sdctrl_p->config.dmaIrqNum, rthw_sdctrl_dma_irq,
|
|
&sdctrl_class.ft_sdctrl, "dmaIrq");
|
|
rt_hw_interrupt_umask(ft_sdctrl_p->config.dmaIrqNum);
|
|
|
|
return 0;
|
|
}
|
|
|
|
INIT_DEVICE_EXPORT(rthw_sdctrl_init);
|
|
|
|
void ft2004_mmcsd_change(void)
|
|
{
|
|
mmcsd_change(sdctrl_class.host);
|
|
}
|
|
|
|
rt_bool_t ft2004_card_status(void)
|
|
{
|
|
return FSdCtrl_CardDetect(&sdctrl_class.ft_sdctrl);
|
|
}
|
|
|
|
rt_err_t ft2004_card_remove_check(rt_int32_t timeout, rt_uint32_t *status)
|
|
{
|
|
return rt_event_recv(&sdctrl_class.event, SDCTR_CARD_REMOVE_FLG, RT_EVENT_FLAG_CLEAR | RT_EVENT_FLAG_OR,
|
|
timeout, status);
|
|
}
|
|
|
|
void ft2004_sdctrl_reset(void)
|
|
{
|
|
FSdCtrl_Reset(&sdctrl_class.ft_sdctrl, (pFtsdCtrl_delayTimer_t)rthw_sdctrl_delay);
|
|
FsdCtrl_Init(&sdctrl_class.ft_sdctrl);
|
|
|
|
#ifdef BSP_SDC_USE_IRQ
|
|
FSdCtrl_NormalIrqSet(&sdctrl_class.ft_sdctrl, NORMAL_IRQ_CC | NORMAL_IRQ_CR | NORMAL_IRQ_EI);
|
|
FSdCtrl_BdIrqSet(&sdctrl_class.ft_sdctrl, BD_IRQ_TRS | BD_IRQ_RESPE);
|
|
#endif
|
|
}
|
|
|
|
#endif
|