448 lines
13 KiB
C
448 lines
13 KiB
C
/*
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* File : mips_asm.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2016Äê9ÔÂ7ÈÕ Urey the first version
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*/
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#ifndef _MIPS_ASM_H_
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#define _MIPS_ASM_H_
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/* ********************************************************************* */
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/* Interface macro & data definition */
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#ifdef __ASSEMBLY__
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/******** ASSEMBLER SPECIFIC DEFINITIONS ********/
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#ifdef __ghs__
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#define ALIGN(x) .##align (1 << (x))
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#else
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#define ALIGN(x) .##align (x)
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#endif
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#ifdef __ghs__
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#define SET_MIPS3()
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#define SET_MIPS0()
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#define SET_PUSH()
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#define SET_POP()
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#else
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#define SET_MIPS3() .##set mips3
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#define SET_MIPS0() .##set mips0
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#define SET_PUSH() .##set push
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#define SET_POP() .##set pop
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#endif
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/* Different assemblers have different requirements for how to
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* indicate that the next section is bss :
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*
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* Some use : .bss
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* Others use : .section bss
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*
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* We select which to use based on _BSS_OLD_, which may be defined
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* in makefile.
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*/
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#ifdef _BSS_OLD_
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#define BSS .##section bss
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#else
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#define BSS .##bss
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#endif
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#define LEAF(name)\
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.##text;\
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.##globl name;\
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.##ent name;\
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name:
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#define SLEAF(name)\
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.##text;\
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.##ent name;\
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name:
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#ifdef __ghs__
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#define END(name)\
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.##end name
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#else
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#define END(name)\
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.##size name,.-name;\
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.##end name
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#endif
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#define EXTERN(name)
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#else
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#define U64 unsigned long long
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#define U32 unsigned int
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#define U16 unsigned short
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#define U8 unsigned char
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#define S64 signed long long
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#define S32 int
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#define S16 short int
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#define S8 signed char
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//#define bool U8
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#ifndef _SIZE_T_
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#define _SIZE_T_
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#ifdef __ghs__
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typedef unsigned int size_t;
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#else
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typedef unsigned long size_t;
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#endif
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#endif
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/* Sets the result on bPort */
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#define BIT_SET(bPort,bBitMask) (bPort |= bBitMask)
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#define BIT_CLR(bPort,bBitMask) (bPort &= ~bBitMask)
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/* Returns the result */
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#define GET_BIT_SET(bPort,bBitMask) (bPort | bBitMask)
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#define GET_BIT_CLR(bPort,bBitMask) (bPort & ~bBitMask)
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/* Returns 0 if the condition is False & a non-zero value if it is True */
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#define TEST_BIT_SET(bPort,bBitMask) (bPort & bBitMask)
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#define TEST_BIT_CLR(bPort,bBitMask) ((~bPort) & bBitMask)
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/* Split union definitions */
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typedef union tunSU16
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{
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U16 hwHW;
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struct tst2U8
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{
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U8 bB0;
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U8 bB1;
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}st2U8;
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}tunSU16;
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typedef union tunSU32
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{
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U32 wW;
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struct tst2U16
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{
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U16 hwHW0;
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U16 hwHW1;
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}st2U16;
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struct tst4U8
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{
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U8 bB0;
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U8 bB1;
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U8 bB2;
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U8 bB3;
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}st4U8;
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}tunSU32;
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#endif /* #ifdef __ASSEMBLY__ */
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/******** DEFINITIONS FOR BOTH ASSEMBLER AND C ********/
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#define NO_ERR 0x00000000 /* operation completed successfully */
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#define ERR 0xffffffff /* operation completed not successfully */
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#define False 0
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#define True !False
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#ifndef NULL
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#define NULL ((void *)0)
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#endif//NULL
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#ifndef MIN
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#define MIN(x,y) ((x) < (y) ? (x) : (y))
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#endif//MIN
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#ifndef MAX
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#define MAX(x,y) ((x) > (y) ? (x) : (y))
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#endif//MAX
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#define MAXUINT(w) (\
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((w) == sizeof(U8)) ? 0xFFU :\
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((w) == sizeof(U16)) ? 0xFFFFU :\
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((w) == sizeof(U32)) ? 0xFFFFFFFFU : 0\
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)
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#define MAXINT(w) (\
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((w) == sizeof(S8)) ? 0x7F :\
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((w) == sizeof(S16)) ? 0x7FFF :\
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((w) == sizeof(S32)) ? 0x7FFFFFFF : 0\
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)
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#define MSK(n) ((1 << (n)) - 1)
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#define KUSEG_MSK 0x80000000
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#define KSEG_MSK 0xE0000000
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#define KUSEGBASE 0x00000000
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#define KSEG0BASE 0x80000000
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#define KSEG1BASE 0xA0000000
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#define KSSEGBASE 0xC0000000
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#define KSEG3BASE 0xE0000000
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/* Below macros perform the following functions :
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*
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* KSEG0 : Converts KSEG0/1 or physical addr (below 0.5GB) to KSEG0.
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* KSEG1 : Converts KSEG0/1 or physical addr (below 0.5GB) to KSEG1.
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* PHYS : Converts KSEG0/1 or physical addr (below 0.5GB) to physical address.
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* KSSEG : Not relevant for converting, but used for determining range.
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* KSEG3 : Not relevant for converting, but used for determining range.
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* KUSEG : Not relevant for converting, but used for determining range.
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* KSEG0A : Same as KSEG0 but operates on register rather than constant.
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* KSEG1A : Same as KSEG1 but operates on register rather than constant.
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* PHYSA : Same as PHYS but operates on register rather than constant.
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* CACHED : Alias for KSEG0 macro .
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* (Note that KSEG0 cache attribute is determined by K0
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* field of Config register, but this is typically cached).
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* UNCACHED : Alias for KSEG1 macro .
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*/
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#ifdef __ASSEMBLY__
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#define KSEG0(addr) (((addr) & ~KSEG_MSK) | KSEG0BASE)
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#define KSEG1(addr) (((addr) & ~KSEG_MSK) | KSEG1BASE)
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#define KSSEG(addr) (((addr) & ~KSEG_MSK) | KSSEGBASE)
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#define KSEG3(addr) (((addr) & ~KSEG_MSK) | KSEG3BASE)
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#define KUSEG(addr) (((addr) & ~KUSEG_MSK) | KUSEGBASE)
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#define PHYS(addr) ( (addr) & ~KSEG_MSK)
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#define KSEG0A(reg) and reg, ~KSEG_MSK; or reg, KSEG0BASE
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#define KSEG1A(reg) and reg, ~KSEG_MSK; or reg, KSEG1BASE
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#define PHYSA(reg) and reg, ~KSEG_MSK
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#else
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#define KSEG0(addr) (((U32)(addr) & ~KSEG_MSK) | KSEG0BASE)
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#define KSEG1(addr) (((U32)(addr) & ~KSEG_MSK) | KSEG1BASE)
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#define KSSEG(addr) (((U32)(addr) & ~KSEG_MSK) | KSSEGBASE)
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#define KSEG3(addr) (((U32)(addr) & ~KSEG_MSK) | KSEG3BASE)
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#define KUSEG(addr) (((U32)(addr) & ~KUSEG_MSK) | KUSEGBASE)
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#define PHYS(addr) ((U32)(addr) & ~KSEG_MSK)
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#endif
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#define CACHED(addr) KSEG0(addr)
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#define UNCACHED(addr) KSEG1(addr)
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#ifdef __ASSEMBLY__
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/* Macroes to access variables at constant addresses
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* Compensates for signed 16 bit displacement
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* Typical use: li a0, HIKSEG1(ATLAS_ASCIIWORD)
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* sw v1, LO_OFFS(ATLAS_ASCIIWORD)(a0)
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*/
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#define HIKSEG0(addr) ((KSEG0(addr) + 0x8000) & 0xffff0000)
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#define HIKSEG1(addr) ((KSEG1(addr) + 0x8000) & 0xffff0000)
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#define HI_PART(addr) (((addr) + 0x8000) & 0xffff0000)
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#define LO_OFFS(addr) ((addr) & 0xffff)
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#endif
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/* Most/Least significant 32 bit from 64 bit double word */
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#define HI32(data64) ((U32)(data64 >> 32))
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#define LO32(data64) ((U32)(data64 & 0xFFFFFFFF))
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#if ((!defined(__ASSEMBLY__)) && (!defined(__LANGUAGE_ASSEMBLY)))
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#define REG8( addr ) (*(volatile U8 *) (addr))
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#define REG16( addr ) (*(volatile U16 *)(addr))
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#define REG32( addr ) (*(volatile U32 *)(addr))
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#define REG64( addr ) (*(volatile U64 *)(addr))
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#endif
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/* Register field mapping */
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#define REGFIELD(reg, rfld) (((reg) & rfld##_MSK) >> rfld##_SHF)
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/* absolute register address, access */
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#define REGA(addr) REG32(addr)
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/* physical register address, access: base address + offsett */
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#define REGP(base,phys) REG32( (U32)(base) + (phys) )
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/* relative register address, access: base address + offsett */
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#define REG(base,offs) REG32( (U32)(base) + offs##_##OFS )
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/* relative register address, access: base address + offsett */
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#define REG_8(base,offs) REG8( (U32)(base) + offs##_##OFS )
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/* relative register address, access: base address + offsett */
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#define REG_16(base,offs) REG16( (U32)(base) + offs##_##OFS )
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/* relative register address, access: base address + offsett */
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#define REG_64(base,offs) REG64( (U32)(base) + offs##_##OFS )
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/**************************************
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* Macroes not used by YAMON any more
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* (kept for backwards compatibility)
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*/
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/* register read field */
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#define REGARD(addr,fld) ((REGA(addr) & addr##_##fld##_##MSK) \
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>> addr##_##fld##_##SHF)
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/* register write numeric field value */
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#define REGAWRI(addr,fld,intval) ((REGA(addr) & ~(addr##_##fld##_##MSK))\
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| ((intval) << addr##_##fld##_##SHF))
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/* register write enumerated field value */
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#define REGAWRE(addr,fld,enumval) ((REGA(addr) & ~(addr##_##fld##_##MSK))\
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| ((addr##_##fld##_##enumval) << addr##_##fld##_##SHF))
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/* Examples:
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*
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* exccode = REGARD(CPU_CAUSE,EXC);
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*
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* REGA(SDR_CONTROL) = REGAWRI(OSG_CONTROL,TMO,17)
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* | REGAWRE(OSG_CONTROL,DTYPE,PC1);
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*/
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/* register read field */
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#define REGRD(base,offs,fld) ((REG(base,offs) & offs##_##fld##_##MSK) \
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>> offs##_##fld##_##SHF)
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/* register write numeric field value */
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#define REGWRI(base,offs,fld,intval)((REG(base,offs)& ~(offs##_##fld##_##MSK))\
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| (((intval) << offs##_##fld##_##SHF) & offs##_##fld##_##MSK))
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/* register write enumerated field value */
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#define REGWRE(base,offs,fld,enumval)((REG(base,offs) & ~(offs##_##fld##_##MSK))\
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| ((offs##_##fld##_##enumval) << offs##_##fld##_##SHF))
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/* physical register read field */
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#define REGPRD(base,phys,fld) ((REGP(base,phys) & phys##_##fld##_##MSK) \
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>> phys##_##fld##_##SHF)
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/* physical register write numeric field value */
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#define REGPWRI(base,phys,fld,intval)((REGP(base,phys)& ~(phys##_##fld##_##MSK))\
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| ((intval) << phys##_##fld##_##SHF))
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/* physical register write enumerated field value */
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#define REGPWRE(base,phys,fld,enumval)((REGP(base,phys) & ~(phys##_##fld##_##MSK))\
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| ((phys##_##fld##_##enumval) << phys##_##fld##_##SHF))
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/*
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* End of macroes not used by YAMON any more
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*********************************************/
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/* Endian related macros */
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#define SWAP_BYTEADDR32( addr ) ( (addr) ^ 0x3 )
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#define SWAP_U16ADDR32( addr ) ( (addr) ^ 0x2 )
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/* Set byte address to little endian format */
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#ifdef EL
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#define SWAP_BYTEADDR_EL(addr) addr
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#else
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#define SWAP_BYTEADDR_EL(addr) SWAP_BYTEADDR32( addr )
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#endif
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/* Set byte address to big endian format */
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#ifdef EB
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#define SWAP_BYTEADDR_EB(addr) addr
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#else
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#define SWAP_BYTEADDR_EB(addr) SWAP_BYTEADDR32( addr )
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#endif
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/* Set U16 address to little endian format */
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#ifdef EL
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#define SWAP_U16ADDR_EL(addr) addr
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#else
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#define SWAP_U16ADDR_EL(addr) SWAP_U16ADDR32( addr )
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#endif
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/* Set U16 address to big endian format */
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#ifdef EB
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#define SWAP_U16ADDR_EB(addr) addr
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#else
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#define SWAP_U16ADDR_EB(addr) SWAP_U16ADDR32( addr )
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#endif
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#ifdef EL
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#define REGW32LE(addr, data) REG32(addr) = (data)
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#define REGR32LE(addr, data) (data) = REG32(addr)
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#else
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#define REGW32LE(addr, data) REG32(addr) = SWAPEND32(data)
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#define REGR32LE(addr, data) (data) = REG32(addr), (data) = SWAPEND32(data)
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#endif
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/* Set of 'LE'-macros, convert by BE: */
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#ifdef EL
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#define CPU_TO_LE32( value ) (value)
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#define LE32_TO_CPU( value ) (value)
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#define CPU_TO_LE16( value ) (value)
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#define LE16_TO_CPU( value ) (value)
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#else
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#define CPU_TO_LE32( value ) ( ( ((U32)value) << 24) | \
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((0x0000FF00UL & ((U32)value)) << 8) | \
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((0x00FF0000UL & ((U32)value)) >> 8) | \
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( ((U32)value) >> 24) )
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#define LE32_TO_CPU( value ) CPU_TO_LE32( value )
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#define CPU_TO_LE16( value ) ( ((U16)(((U16)value) << 8)) | \
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((U16)(((U16)value) >> 8)) )
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#define LE16_TO_CPU( value ) CPU_TO_LE16( value )
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#endif
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/* Set of 'BE'-macros, convert by LE: */
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#ifdef EB
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#define CPU_TO_BE32( value ) (value)
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#define BE32_TO_CPU( value ) (value)
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#define CPU_TO_BE16( value ) (value)
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#define BE16_TO_CPU( value ) (value)
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#else
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#define CPU_TO_BE32( value ) ( ( ((U32)value) << 24) | \
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((0x0000FF00UL & ((U32)value)) << 8) | \
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((0x00FF0000UL & ((U32)value)) >> 8) | \
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( ((U32)value) >> 24) )
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#define BE32_TO_CPU( value ) CPU_TO_BE32( value )
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#define CPU_TO_BE16( value ) ( ((U16)(((U16)value) << 8)) | \
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((U16)(((U16)value) >> 8)) )
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#define BE16_TO_CPU( value ) CPU_TO_BE16( value )
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#endif
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/* Control characters */
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#define CTRL_A ('A'-0x40)
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#define CTRL_B ('B'-0x40)
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#define CTRL_C ('C'-0x40)
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#define CTRL_D ('D'-0x40)
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#define CTRL_E ('E'-0x40)
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#define CTRL_F ('F'-0x40)
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#define CTRL_H ('H'-0x40)
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#define CTRL_K ('K'-0x40)
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#define CTRL_N ('N'-0x40)
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#define CTRL_P ('P'-0x40)
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#define CTRL_U ('U'-0x40)
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#define BACKSPACE 0x08
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#define DEL 0x7F
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#define TAB 0x09
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#define CR 0x0D /* Enter Key */
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#define LF 0x0A
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#define ESC 0x1B
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#define SP 0x20
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#define CSI 0x9B
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/* DEF2STR(x) converts #define symbol to string */
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#define DEF2STR1(x) #x
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#define DEF2STR(x) DEF2STR1(x)
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#endif /* _MIPS_ASM_H_ */
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