156 lines
5.7 KiB
C
156 lines
5.7 KiB
C
/**************************************************************************//**
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* @file system_fm33lc0xx.h
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* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File for
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* Device FM33LC0XX
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* @version V2.00
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* @date 15. March 2021
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*
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* @note
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*
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******************************************************************************/
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/* Copyright (c) 2012 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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*
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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#ifndef SYSTEM_FM33LC0XX_H
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#define SYSTEM_FM33LC0XX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdio.h>
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#include "fm33lc0xx.h"
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#define USE_LSCLK_CLOCK_SRC_XTLF
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//#define SYSCLK_SRC_RC4M
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//#define SYSCLK_SRC_XTHF
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#define SYSCLK_SRC_RCHF
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//#define SYSCLK_SRC_PLL
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//#define USE_PLL_CLOCK_SRC_RCHF
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//#define USE_PLL_CLOCK_SRC_XTHF
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#if ((!defined(SYSCLK_SRC_RC4M)) && (!defined(SYSCLK_SRC_XTHF))&&(!defined(SYSCLK_SRC_PLL))&&(!defined(SYSCLK_SRC_RCHF)))
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#error "Must select a clock source form the SYSCLK_SRC_RC4M or SYSCLK_SRC_XTHF or SYSCLK_SRC_PLL or SYSCLK_SRC_RCHF as the master clock."
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#elif (((defined(SYSCLK_SRC_RC4M)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RCHF))))||\
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((defined(SYSCLK_SRC_XTHF)) && ((defined(SYSCLK_SRC_RC4M))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RCHF))))||\
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((defined(SYSCLK_SRC_PLL)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_RC4M))||(defined(SYSCLK_SRC_RCHF))))||\
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((defined(SYSCLK_SRC_RCHF)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RC4M)))))
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#error "Only one clock source can be selected as the master clock."
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#endif
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#if defined(SYSCLK_SRC_PLL) && !defined(USE_PLL_CLOCK_SRC_RCHF) && !defined(USE_PLL_CLOCK_SRC_XTHF)
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#error "You have chosen to enable the PLL, so you need to specify the clock source for the PLL.."
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#elif defined(SYSCLK_SRC_PLL) && (defined(USE_PLL_CLOCK_SRC_RCHF) && defined(USE_PLL_CLOCK_SRC_XTHF))
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#error "Please select one of the USE_PLL_CLOCK_SRC_RCHF and USE_PLL_CLOCK_SRC_XTHF in your application"
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#endif
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#if !defined (XTHF_VALUE)
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#define XTHF_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
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#endif /* XTHF_VALUE */
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#if !defined (XTLF_VALUE)
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#define XTLF_VALUE ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
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#endif /* XTLF_VALUE */
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#define LDT_CHECK(_N_VALUE_, _T_VALUE_) \
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((((_N_VALUE_ >> 16) & 0xffff) == \
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((~_N_VALUE_) & 0xffff)) ? _N_VALUE_ : _T_VALUE_)
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#define LPOSC_LDT_TRIM (*(uint32_t *)0x1FFFFB20) // LPOSC 常温校准值
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#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40) // RC8M 常温校准值
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#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3C) // RC16M 常温校准值
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#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38) // RC24M 常温校准值
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#define RCMF4M_LDT_TRIM (*(uint32_t *)0x1FFFFB44) // RCMF 常温校准值
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#define LPOSC_TRIM (LDT_CHECK(LPOSC_LDT_TRIM, 0x80) & 0xff)
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#define RCMF4M_TRIM (LDT_CHECK(RCMF4M_LDT_TRIM, 0x40) & 0x7f)
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#define RCHF8M_TRIM (LDT_CHECK(RCHF8M_LDT_TRIM, 0x40) & 0x7f)
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#define RCHF16M_TRIM (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7f)
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#define RCHF24M_TRIM (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7f)
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#define __SYSTEM_CLOCK (8000000)
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/**
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* @brief FL NVIC Init Sturcture definition
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*/
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typedef struct
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{
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/* 中断抢占优先级 */
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uint32_t preemptPriority;
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}NVIC_ConfigTypeDef;
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemCoreClock variable.
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*/
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void SystemInit (void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*/
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extern uint32_t SystemCoreClock;
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void SystemCoreClockUpdate (void);
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/**
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* @brief NVIC_Init config NVIC
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*
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* @param NVIC_configStruct configParams
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*
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* @param IRQn Interrupt number
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*
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* @retval None
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*/
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void NVIC_Init(NVIC_ConfigTypeDef *NVIC_configStruct,IRQn_Type IRQn);
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#ifdef __cplusplus
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}
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#endif
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#endif /* SYSTEM_FM33LC0XX_H */
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