528 lines
12 KiB
C
Executable File
528 lines
12 KiB
C
Executable File
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-08-25 GuEe-GUI first version
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*/
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#include <rtthread.h>
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#include <drivers/ofw.h>
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#include <drivers/ofw_io.h>
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#include <drivers/ofw_fdt.h>
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#include <drivers/misc.h>
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#define DBG_TAG "rtdm.ofw"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#include "ofw_internal.h"
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static volatile rt_atomic_t _bus_ranges_idx = 0;
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static struct bus_ranges *_bus_ranges[RT_USING_OFW_BUS_RANGES_NUMBER] = {};
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static int ofw_bus_addr_cells(struct rt_ofw_node *np)
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{
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int res = OFW_ROOT_NODE_ADDR_CELLS_DEFAULT;
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for (rt_uint32_t cells; np; np = np->parent)
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{
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if (!rt_ofw_prop_read_u32(np, "#address-cells", &cells))
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{
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res = cells;
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break;
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}
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}
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return res;
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}
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static int ofw_bus_size_cells(struct rt_ofw_node *np)
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{
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int res = OFW_ROOT_NODE_SIZE_CELLS_DEFAULT;
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for (rt_uint32_t cells; np; np = np->parent)
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{
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if (!rt_ofw_prop_read_u32(np, "#size-cells", &cells))
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{
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res = cells;
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break;
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}
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}
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return res;
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}
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int rt_ofw_bus_addr_cells(struct rt_ofw_node *np)
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{
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return np ? ofw_bus_addr_cells(np) : -RT_EINVAL;
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}
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int rt_ofw_bus_size_cells(struct rt_ofw_node *np)
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{
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return np ? ofw_bus_size_cells(np) : -RT_EINVAL;
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}
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int rt_ofw_io_addr_cells(struct rt_ofw_node *np)
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{
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return np ? ofw_bus_addr_cells(np->parent ? np->parent : np) : -RT_EINVAL;
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}
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int rt_ofw_io_size_cells(struct rt_ofw_node *np)
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{
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return np ? ofw_bus_size_cells(np->parent ? np->parent : np) : -RT_EINVAL;
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}
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int rt_ofw_get_address_count(struct rt_ofw_node *np)
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{
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int count;
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if (np)
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{
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rt_ssize_t len;
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count = 0;
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if (rt_ofw_get_prop(np, "reg", &len))
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{
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count = len / (sizeof(fdt32_t) * (rt_ofw_io_addr_cells(np) + rt_ofw_io_size_cells(np)));
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}
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}
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else
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{
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count = -RT_EINVAL;
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}
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return count;
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}
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static rt_err_t ofw_get_address(struct rt_ofw_node *np, int index, rt_uint64_t *out_address, rt_uint64_t *out_size)
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{
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rt_ssize_t len;
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rt_err_t err = RT_EOK;
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int addr_cells = rt_ofw_io_addr_cells(np);
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int size_cells = rt_ofw_io_size_cells(np);
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int skip_cells = (addr_cells + size_cells) * index;
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const fdt32_t *cell = rt_ofw_prop_read_raw(np, "reg", &len);
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if (cell && skip_cells < (len / sizeof(*cell)))
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{
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cell += skip_cells;
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*out_address = rt_fdt_next_cell(&cell, addr_cells);
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*out_address = rt_ofw_translate_address(np, RT_NULL, *out_address);
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*out_size = rt_fdt_read_number(cell, size_cells);
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}
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else
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{
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err = -RT_EINVAL;
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}
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return err;
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}
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rt_err_t rt_ofw_get_address(struct rt_ofw_node *np, int index, rt_uint64_t *out_address, rt_uint64_t *out_size)
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{
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rt_err_t err;
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if (np && index >= 0 && (out_address || out_size))
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{
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rt_uint64_t address, size;
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err = ofw_get_address(np, index, &address, &size);
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if (!err)
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{
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if (out_address)
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{
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*out_address = address;
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}
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if (out_size)
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{
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*out_size = size;
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}
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}
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}
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else
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{
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err = -RT_EINVAL;
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}
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return err;
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}
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static rt_err_t ofw_get_address_by_name(struct rt_ofw_node *np, const char *name,
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rt_uint64_t *out_address, rt_uint64_t *out_size)
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{
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int index = 0;
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rt_err_t err = -RT_EEMPTY;
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const char *reg_name;
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struct rt_ofw_prop *prop;
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rt_ofw_foreach_prop_string(np, "reg-names", prop, reg_name)
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{
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if (!rt_strcmp(name, reg_name))
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{
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err = rt_ofw_get_address(np, index, out_address, out_size);
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break;
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}
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++index;
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}
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return err;
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}
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rt_err_t rt_ofw_get_address_by_name(struct rt_ofw_node *np, const char *name,
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rt_uint64_t *out_address, rt_uint64_t *out_size)
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{
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rt_err_t err;
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if (np && name && (out_address || out_size))
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{
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rt_uint64_t address, size;
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err = ofw_get_address_by_name(np, name, &address, &size);
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if (!err)
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{
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if (out_address)
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{
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*out_address = address;
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}
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if (out_size)
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{
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*out_size = size;
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}
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}
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}
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else
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{
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err = -RT_EINVAL;
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}
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return err;
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}
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int rt_ofw_get_address_array(struct rt_ofw_node *np, int nr, rt_uint64_t *out_regs)
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{
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int count;
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if (np && nr > 0 && out_regs)
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{
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rt_ssize_t len;
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int max_nr;
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int addr_cells = rt_ofw_io_addr_cells(np);
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int size_cells = rt_ofw_io_size_cells(np);
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const fdt32_t *cell = rt_ofw_prop_read_raw(np, "reg", &len);
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max_nr = len / (sizeof(*cell) * (addr_cells + size_cells));
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if (nr > max_nr)
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{
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nr = max_nr;
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}
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count = nr;
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while (nr --> 0)
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{
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*out_regs = rt_fdt_next_cell(&cell, addr_cells);
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*out_regs = rt_ofw_translate_address(np, RT_NULL, *out_regs);
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++out_regs;
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*out_regs = rt_fdt_next_cell(&cell, size_cells);
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++out_regs;
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}
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}
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else
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{
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count = -RT_EINVAL;
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}
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return count;
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}
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static struct bus_ranges *ofw_bus_ranges(struct rt_ofw_node *np, struct rt_ofw_prop *prop)
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{
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int id;
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const fdt32_t *cell;
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struct bus_ranges *ranges = RT_NULL;
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int child_address_cells, child_size_cells, parent_address_cells, groups;
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rt_uint64_t *child_addr, *parent_addr, *child_size;
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/*
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* Address Translation Example:
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*
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* / {
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* #address-cells = <1>;
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* #size-cells = <1>;
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*
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* soc {
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* compatible = "simple-bus";
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* #address-cells = <1>;
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* #size-cells = <1>;
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* ranges = <0x0 0xe0000000 0x00100000>;
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*
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* serial@4600 {
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* device_type = "serial";
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* reg = <0x4600 0x100>;
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* clock-frequency = <0>;
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* };
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* };
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* }
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*
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* The soc node specifies a ranges property of <0x0 0xe0000000 0x00100000>;
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* This property value specifies that for a 1024 KB range of address space, a
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* child node addressed at physical 0x0 maps to a parent address of physical
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* 0xe0000000. With this mapping, the serial device node can be addressed by a
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* load or store at address 0xe0004600, an offset of 0x4600 (specified in reg)
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* plus the 0xe0000000 mapping specified in ranges:
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*
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* bus-address = parent-bus-address + (reg-address - child-bus-address)
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*/
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do {
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child_address_cells = rt_ofw_bus_addr_cells(np);
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child_size_cells = rt_ofw_bus_size_cells(np);
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parent_address_cells = rt_ofw_io_addr_cells(np);
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if (child_address_cells < 0 || child_size_cells < 0 || parent_address_cells < 0)
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{
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LOG_D("%s read address/size cells fail: child[%d, %d] parent[%d]",
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np->full_name, child_address_cells, child_size_cells, parent_address_cells);
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break;
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}
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groups = prop->length / sizeof(*cell);
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groups /= child_address_cells + child_size_cells + parent_address_cells;
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ranges = rt_malloc(sizeof(*ranges) + sizeof(rt_uint64_t) * 3 * groups);
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if (!ranges)
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{
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break;
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}
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ranges->nr = groups;
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ranges->child_addr = (void *)ranges + sizeof(*ranges);
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ranges->parent_addr = &ranges->child_addr[groups];
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ranges->child_size = &ranges->parent_addr[groups];
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cell = prop->value;
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child_addr = ranges->child_addr;
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parent_addr = ranges->parent_addr;
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child_size = ranges->child_size;
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while (groups --> 0)
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{
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*child_addr++ = rt_fdt_next_cell(&cell, child_address_cells);
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*parent_addr++ = rt_fdt_next_cell(&cell, parent_address_cells);
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*child_size++ = rt_fdt_next_cell(&cell, child_size_cells);
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}
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ranges->np = np;
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id = (int)rt_atomic_add(&_bus_ranges_idx, 1);
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RT_ASSERT(id < RT_ARRAY_SIZE(_bus_ranges));
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_bus_ranges[id] = ranges;
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} while (0);
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return ranges;
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}
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rt_uint64_t rt_ofw_translate_address(struct rt_ofw_node *np, const char *range_type, rt_uint64_t address)
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{
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rt_uint64_t cpu_addr = address;
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if (!range_type)
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{
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range_type = "ranges";
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}
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rt_ofw_foreach_parent_node(np)
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{
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rt_ssize_t len;
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struct rt_ofw_prop *prop;
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struct bus_ranges *ranges = RT_NULL;
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prop = rt_ofw_get_prop(np, range_type, &len);
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if (!prop || !len)
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{
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continue;
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}
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for (int i = 0; i < RT_ARRAY_SIZE(_bus_ranges); ++i)
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{
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if (!_bus_ranges[i])
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{
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break;
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}
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if (_bus_ranges[i]->np == np)
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{
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ranges = _bus_ranges[i];
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break;
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}
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}
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if (!ranges)
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{
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ranges = ofw_bus_ranges(np, prop);
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}
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if (ranges)
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{
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for (int i = 0; i < ranges->nr; ++i)
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{
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rt_uint64_t child_addr = ranges->child_addr[i];
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rt_uint64_t child_size = ranges->child_size[i];
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if (address >= child_addr && address < child_addr + child_size)
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{
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cpu_addr = address + (ranges->parent_addr[i] - child_addr);
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break;
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}
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}
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}
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else
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{
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cpu_addr = ~0ULL;
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}
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rt_ofw_node_put(np);
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break;
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}
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return cpu_addr;
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}
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rt_uint64_t rt_ofw_reverse_address(struct rt_ofw_node *np, const char *range_type, rt_uint64_t address)
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{
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rt_uint64_t bus_addr = address;
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if (!range_type)
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{
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range_type = "ranges";
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}
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rt_ofw_foreach_parent_node(np)
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{
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rt_ssize_t len;
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struct rt_ofw_prop *prop;
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struct bus_ranges *ranges = RT_NULL;
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prop = rt_ofw_get_prop(np, range_type, &len);
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if (!prop || !len)
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{
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continue;
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}
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for (int i = 0; i < RT_ARRAY_SIZE(_bus_ranges); ++i)
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{
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if (!_bus_ranges[i])
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{
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break;
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}
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if (_bus_ranges[i]->np == np)
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{
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ranges = _bus_ranges[i];
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break;
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}
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}
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if (!ranges)
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{
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ranges = ofw_bus_ranges(np, prop);
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}
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if (ranges)
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{
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for (int i = 0; i < ranges->nr; ++i)
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{
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rt_uint64_t parent_addr = ranges->parent_addr[i];
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rt_uint64_t child_size = ranges->child_size[i];
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if (address >= parent_addr && address < parent_addr + child_size)
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{
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bus_addr = ranges->child_addr[i] + (address - parent_addr);
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break;
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}
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}
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}
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else
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{
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bus_addr = ~0ULL;
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}
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rt_ofw_node_put(np);
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break;
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}
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return bus_addr;
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}
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#ifdef ARCH_CPU_64BIT
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#define ofw_address_cpu_cast(np, address) (void *)(address)
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#else
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#define ofw_address_cpu_cast(np, address) \
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({ \
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if (((address) >> 32)) \
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{ \
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LOG_W("%s find 64 bits address = %x%x", \
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rt_ofw_node_full_name(np), \
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ofw_static_cast(rt_ubase_t, (address) >> 32), \
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ofw_static_cast(rt_ubase_t, (address))); \
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} \
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(void *)ofw_static_cast(rt_ubase_t, (address)); \
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})
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#endif
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void *rt_ofw_iomap(struct rt_ofw_node *np, int index)
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{
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void *iomem = RT_NULL;
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if (np)
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{
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rt_uint64_t regs[2];
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if (!ofw_get_address(np, index, ®s[0], ®s[1]))
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{
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iomem = rt_ioremap(ofw_address_cpu_cast(np, regs[0]), (size_t)regs[1]);
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}
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}
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return iomem;
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}
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void *rt_ofw_iomap_by_name(struct rt_ofw_node *np, const char *name)
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{
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void *iomem = RT_NULL;
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if (np)
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{
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rt_uint64_t regs[2];
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if (!ofw_get_address_by_name(np, name, ®s[0], ®s[1]))
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{
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iomem = rt_ioremap(ofw_address_cpu_cast(np, regs[0]), (size_t)regs[1]);
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}
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}
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return iomem;
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}
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