160 lines
4.0 KiB
C
160 lines
4.0 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-06-27 AHTYDHD the first version
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*/
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#include "drv_adc.h"
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#include <stdint.h>
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#include <stdbool.h>
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#include "inc/hw_memmap.h"
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#include "driverlib/adc.h"
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#include "driverlib/sysctl.h"
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#ifdef RT_USING_ADC
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#include "adc_config.h"
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#include "tm4c123_config.h"
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#include <string.h>
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#define LOG_TAG "drv.adc"
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#include <drv_log.h>
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static struct tm4c123_adc_config adc_config[] =
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{
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#ifdef BSP_USING_ADC0
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ADC0_CONFIG,
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#endif
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#ifdef BSP_USING_ADC1
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ADC1_CONFIG,
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#endif
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};
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struct tm4c123_adc
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{
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struct tm4c123_adc_config *config;
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struct rt_adc_device adc_device;
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};
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static struct tm4c123_adc adc_obj[sizeof(adc_config) / sizeof(adc_config[0])] = {0};
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static rt_err_t tm4c123_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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RT_ASSERT(device != RT_NULL);
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struct tm4c123_adc_config *config = (struct tm4c123_adc_config *)device->parent.user_data;
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if (enabled)
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{
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ADCSequenceEnable(config->adcbase, config->sequence);
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ADCIntClear(config->adcbase, config->sequence);
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}
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else
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{
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ADCSequenceDisable(config->adcbase, config->sequence);
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}
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return RT_EOK;
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}
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static rt_err_t tm4c123_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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uint32_t pui32ADC0Value[4] = {0};
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struct tm4c123_adc_config *config = (struct tm4c123_adc_config *)device->parent.user_data;
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/* Trigger the ADC conversion. */
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ADCProcessorTrigger(config->adcbase, config->sequence);
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while (!ADCIntStatus(config->adcbase, config->sequence, false))
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{
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}
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/* Clear the ADC interrupt flag. */
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ADCIntClear(config->adcbase, config->sequence);
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/* Read ADC Value. */
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ADCSequenceDataGet(config->adcbase, config->sequence, pui32ADC0Value);
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/* get ADC value */
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*value = (rt_uint32_t)pui32ADC0Value[channel];
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return RT_EOK;
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}
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static const struct rt_adc_ops tm4c123_adc_ops =
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{
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.enabled = tm4c123_adc_enabled,
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.convert = tm4c123_get_adc_value,
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};
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static rt_err_t tm4c123_hw_adc_init(struct tm4c123_adc *device)
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{
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uint32_t adcbase = device->config->adcbase;
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uint32_t sequencenum = device->config->sequence;
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ADCSequenceConfigure(adcbase, sequencenum,
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device->config->trigermode, 0);
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ADCSequenceStepConfigure(adcbase, sequencenum, 0, ADC_CTL_CH7);
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ADCSequenceStepConfigure(adcbase, sequencenum, 1, ADC_CTL_CH6 | ADC_CTL_IE);
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ADCSequenceStepConfigure(adcbase, sequencenum, 2, ADC_CTL_CH5);
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/*Tell the ADC logic
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that this is the last conversion on sequence 3 (ADC_CTL_END). */
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ADCSequenceStepConfigure(adcbase, sequencenum, 3, ADC_CTL_CH4 | ADC_CTL_IE |
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ADC_CTL_END);
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return RT_EOK;
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}
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static int tm4c123_adc_init(void)
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{
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int i = 0;
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rt_size_t obj_num = sizeof(adc_obj) / sizeof(struct tm4c123_adc);
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rt_err_t result = RT_EOK;
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adc_hw_config();
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for (i = 0; i < obj_num; i++)
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{
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/* ADC init */
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adc_obj[i].config = &adc_config[i];
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if (tm4c123_hw_adc_init(&adc_obj[i]) != RT_EOK)
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{
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LOG_E("%s init failed", adc_obj[i].config->name);
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result = -RT_ERROR;
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return result;
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}
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else
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{
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LOG_D("%s init success", adc_obj[i].config->name);
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/* register adc device */
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if (rt_hw_adc_register(&adc_obj[i].adc_device, adc_obj[i].config->name, &tm4c123_adc_ops, &adc_config[i]) == RT_EOK)
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{
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LOG_D("%s register success", adc_obj[i].config->name);
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}
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else
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{
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LOG_E("%s register failed", adc_obj[i].config->name);
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result = -RT_ERROR;
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}
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}
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}
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return result;
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}
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INIT_APP_EXPORT(tm4c123_adc_init);
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#endif /*RT_UING_ADC*/
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/************************** end of file ******************/
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