419 lines
9.9 KiB
C
419 lines
9.9 KiB
C
/*
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* Copyright (c) 2006-2024 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-05-05 Bernard The first version
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* 2022-08-24 GuEe-GUI add OFW support
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <cpuport.h>
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#include <ioremap.h>
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#include <drivers/serial_dm.h>
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#define PL011_OEIM RT_BIT(10) /* overrun error interrupt mask */
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#define PL011_BEIM RT_BIT(9) /* break error interrupt mask */
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#define PL011_PEIM RT_BIT(8) /* parity error interrupt mask */
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#define PL011_FEIM RT_BIT(7) /* framing error interrupt mask */
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#define PL011_RTIM RT_BIT(6) /* receive timeout interrupt mask */
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#define PL011_TXIM RT_BIT(5) /* transmit interrupt mask */
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#define PL011_RXIM RT_BIT(4) /* receive interrupt mask */
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#define PL011_DSRMIM RT_BIT(3) /* DSR interrupt mask */
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#define PL011_DCDMIM RT_BIT(2) /* DCD interrupt mask */
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#define PL011_CTSMIM RT_BIT(1) /* CTS interrupt mask */
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#define PL011_RIMIM RT_BIT(0) /* RI interrupt mask */
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#define PL011_DR 0x000
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#define PL011_FR 0x018
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#define PL011_IBRD 0x024
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#define PL011_FBRD 0x028
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#define PL011_LCR 0x02c
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#define PL011_CR 0x030
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#define PL011_IMSC 0x038
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#define PL011_RIS 0x03c
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#define PL011_DMACR 0x048
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#define PL011_LCRH_SPS (1 << 7)
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#define PL011_LCRH_WLEN_8 (3 << 5)
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#define PL011_LCRH_WLEN_7 (2 << 5)
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#define PL011_LCRH_WLEN_6 (1 << 5)
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#define PL011_LCRH_WLEN_5 (0 << 5)
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#define PL011_LCRH_FEN (1 << 4)
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#define PL011_LCRH_STP2 (1 << 3)
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#define PL011_LCRH_EPS (1 << 2)
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#define PL011_LCRH_PEN (1 << 1)
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#define PL011_LCRH_BRK (1 << 0)
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#define PL011_LCRH_WLEN(n) ((n - 5) << 5)
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#define PL011_CR_CTSEN RT_BIT(15)
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#define PL011_CR_RTSEN RT_BIT(14)
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#define PL011_CR_RTS RT_BIT(11)
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#define PL011_CR_DTR RT_BIT(10)
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#define PL011_CR_RXE RT_BIT(9)
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#define PL011_CR_TXE RT_BIT(8)
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#define PL011_CR_LBE RT_BIT(7)
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#define PL011_CR_SIRLP RT_BIT(2)
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#define PL011_CR_SIREN RT_BIT(1)
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#define PL011_CR_UARTEN RT_BIT(0)
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struct pl011
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{
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struct rt_serial_device parent;
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int irq;
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void *base;
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rt_ubase_t freq;
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struct rt_clk *clk;
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struct rt_clk *pclk;
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struct rt_spinlock spinlock;
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};
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#define raw_to_pl011(raw) rt_container_of(raw, struct pl011, parent)
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rt_inline rt_uint32_t pl011_read(struct pl011 *pl011, int offset)
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{
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return HWREG32(pl011->base + offset);
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}
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rt_inline void pl011_write(struct pl011 *pl011, int offset, rt_uint32_t value)
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{
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HWREG32(pl011->base + offset) = value;
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}
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static void pl011_isr(int irqno, void *param)
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{
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struct pl011 *pl011 = param;
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/* Check irq */
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if (pl011_read(pl011, PL011_RIS) & PL011_RXIM)
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{
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rt_base_t level = rt_spin_lock_irqsave(&pl011->spinlock);
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rt_hw_serial_isr(&pl011->parent, RT_SERIAL_EVENT_RX_IND);
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rt_spin_unlock_irqrestore(&pl011->spinlock, level);
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}
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}
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static rt_err_t pl011_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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rt_ubase_t quot;
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struct pl011 *pl011 = raw_to_pl011(serial);
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/* Clear UART setting */
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pl011_write(pl011, PL011_CR, 0);
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/* Disable FIFO */
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pl011_write(pl011, PL011_LCR, 0);
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if (cfg->baud_rate > pl011->freq / 16)
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{
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quot = RT_DIV_ROUND_CLOSEST(pl011->freq * 8, cfg->baud_rate);
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}
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else
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{
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quot = RT_DIV_ROUND_CLOSEST(pl011->freq * 4, cfg->baud_rate);
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}
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pl011_write(pl011, PL011_IBRD, quot >> 6);
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pl011_write(pl011, PL011_FBRD, quot & 0x3f);
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/* FIFO */
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pl011_write(pl011, PL011_LCR, PL011_LCRH_WLEN(cfg->data_bits));
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/* Art enable, TX/RX enable */
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pl011_write(pl011, PL011_CR, PL011_CR_UARTEN | PL011_CR_TXE | PL011_CR_RXE);
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return RT_EOK;
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}
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static rt_err_t pl011_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct pl011 *pl011 = raw_to_pl011(serial);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* Disable rx irq */
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pl011_write(pl011, PL011_IMSC, pl011_read(pl011, PL011_IMSC) & ~PL011_RXIM);
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rt_hw_interrupt_mask(pl011->irq);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* Enable rx irq */
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pl011_write(pl011, PL011_IMSC, pl011_read(pl011, PL011_IMSC) | PL011_RXIM);
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rt_hw_interrupt_umask(pl011->irq);
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break;
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}
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return RT_EOK;
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}
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static int pl011_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct pl011 *pl011 = raw_to_pl011(serial);
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while (pl011_read(pl011, PL011_FR) & PL011_TXIM)
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{
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rt_hw_cpu_relax();
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}
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pl011_write(pl011, PL011_DR, c);
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return 1;
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}
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static int pl011_uart_getc(struct rt_serial_device *serial)
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{
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int ch = -1;
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struct pl011 *pl011 = raw_to_pl011(serial);
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if (!(pl011_read(pl011, PL011_FR) & PL011_RXIM))
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{
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ch = pl011_read(pl011, PL011_DR);
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}
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return ch;
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}
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static const struct rt_uart_ops pl011_uart_ops =
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{
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.configure = pl011_uart_configure,
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.control = pl011_uart_control,
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.putc = pl011_uart_putc,
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.getc = pl011_uart_getc,
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};
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static void pl011_early_kick(struct rt_fdt_earlycon *con, int why)
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{
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struct pl011 *pl011 = raw_to_pl011(con->data);
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switch (why)
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{
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case FDT_EARLYCON_KICK_UPDATE:
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pl011->base = rt_ioremap((void *)con->mmio, con->size);
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break;
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case FDT_EARLYCON_KICK_COMPLETED:
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rt_iounmap(pl011->base);
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break;
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default:
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break;
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}
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}
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static rt_err_t pl011_early_setup(struct rt_fdt_earlycon *con, const char *options)
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{
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rt_err_t err = RT_EOK;
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static struct pl011 pl011 = { };
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if (options && !con->mmio)
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{
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char *arg;
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con->mmio = RT_NULL;
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/*
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* The pl011 serial port must already be setup and configured in early.
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* Options are not yet supported.
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* pl011,<addr>
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* pl011,mmio32,<addr>
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*/
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serial_for_each_args(arg, options)
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{
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if (!rt_strcmp(arg, "pl011") || !rt_strcmp(arg, "mmio32"))
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{
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continue;
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}
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if (!con->mmio)
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{
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con->mmio = (rt_ubase_t)serial_base_from_args(arg);
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break;
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}
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}
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}
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if (!con->size)
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{
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con->size = 0x1000;
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}
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if (con->mmio)
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{
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pl011.base = rt_ioremap_early((void *)con->mmio, con->size);
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}
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if (pl011.base)
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{
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con->console_putc = (typeof(con->console_putc))&pl011_uart_putc;
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con->console_kick = pl011_early_kick;
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con->data = &pl011.parent;
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pl011.parent.config = (typeof(pl011.parent.config))RT_SERIAL_CONFIG_DEFAULT;
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}
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else
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{
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err = -RT_ERROR;
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}
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return err;
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}
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RT_FDT_EARLYCON_EXPORT(pl011, "pl011", "arm,pl011", pl011_early_setup);
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static void pl011_free(struct pl011 *pl011)
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{
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if (pl011->base)
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{
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rt_iounmap(pl011->base);
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}
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/* if (!rt_is_err_or_null(pl011->clk))*/
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/* {*/
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/* rt_clk_disable(pl011->clk);*/
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/* rt_clk_put(pl011->clk);*/
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/* }*/
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/* if (!rt_is_err_or_null(pl011->pclk))*/
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/* {*/
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/* rt_clk_disable_unprepare(pl011->pclk);*/
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/* rt_clk_put(pl011->pclk);*/
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/* }*/
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rt_free(pl011);
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}
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static rt_err_t pl011_probe(struct rt_platform_device *pdev)
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{
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rt_err_t err;
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const char *name;
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char isr_name[RT_NAME_MAX];
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struct rt_device *dev = &pdev->parent;
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struct pl011 *pl011 = rt_calloc(1, sizeof(*pl011));
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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if (!pl011)
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{
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return -RT_ENOMEM;
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}
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pl011->base = rt_dm_dev_iomap(dev, 0);
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if (!pl011->base)
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{
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err = -RT_EIO;
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goto _fail;
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}
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pl011->irq = rt_dm_dev_get_irq(dev, 0);
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if (pl011->irq < 0)
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{
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err = pl011->irq;
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goto _fail;
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}
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/* pl011->clk = rt_clk_get_by_index(dev, 0);*/
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/* if (rt_is_err(pl011->clk))*/
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/* {*/
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/* err = rt_ptr_err(pl011->clk);*/
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/* goto _fail;*/
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/* }*/
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/* pl011->pclk = rt_clk_get_by_name(dev, "apb_pclk");*/
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/* if (rt_is_err(pl011->pclk))*/
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/* {*/
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/* err = rt_ptr_err(pl011->pclk);*/
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/* goto _fail;*/
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/* }*/
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/* if ((err = rt_clk_prepare_enable(pl011->pclk)))*/
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/* {*/
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/* goto _fail;*/
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/* }*/
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rt_dm_dev_bind_fwdata(&pl011->parent.parent, dev->ofw_node, &pl011->parent);
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/* rt_clk_enable(pl011->clk);*/
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/* pl011->freq = rt_clk_get_rate(pl011->clk);*/
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dev->user_data = pl011;
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pl011->parent.ops = &pl011_uart_ops;
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pl011->parent.config = config;
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rt_spin_lock_init(&pl011->spinlock);
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serial_dev_set_name(&pl011->parent);
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name = rt_dm_dev_get_name(&pl011->parent.parent);
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rt_hw_serial_register(&pl011->parent, name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, pl011);
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rt_snprintf(isr_name, RT_NAME_MAX, "%s-pl011", name);
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rt_hw_interrupt_install(pl011->irq, pl011_isr, pl011, isr_name);
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return RT_EOK;
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_fail:
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pl011_free(pl011);
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return err;
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}
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static rt_err_t pl011_remove(struct rt_platform_device *pdev)
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{
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struct rt_device *dev = &pdev->parent;
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struct pl011 *pl011 = dev->user_data;
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rt_dm_dev_unbind_fwdata(dev, RT_NULL);
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rt_hw_interrupt_mask(pl011->irq);
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rt_pic_detach_irq(pl011->irq, pl011);
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rt_device_unregister(&pl011->parent.parent);
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pl011_free(pl011);
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return RT_EOK;
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}
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static const struct rt_ofw_node_id pl011_ofw_ids[] =
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{
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{ .type = "ttyAMA", .compatible = "arm,pl011" },
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{ .type = "ttyAMA", .compatible = "arm,pl011-axi" },
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{ /* sentinel */ }
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};
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static struct rt_platform_driver pl011_driver =
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{
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.name = "serial-pl011",
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.ids = pl011_ofw_ids,
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.probe = pl011_probe,
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.remove = pl011_remove,
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};
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static int pl011_drv_register(void)
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{
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rt_platform_driver_register(&pl011_driver);
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return 0;
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}
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INIT_DRIVER_EARLY_EXPORT(pl011_drv_register);
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