182 lines
4.6 KiB
C
182 lines
4.6 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-02-02 michael5hzg@gmail.com adapt to ls1b
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*/
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// 串口相关头文件
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#ifndef __LOONGSON_UART_H
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#define __LOONGSON_UART_H
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#include "ls1b_public.h"
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// 串口各寄存器相对基地址的偏移
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#define LS1B_UART_DAT_OFFSET (0)
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#define LS1B_UART_IER_OFFSET (1)
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#define LS1B_UART_IIR_OFFSET (2)
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#define LS1B_UART_FCR_OFFSET (2)
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#define LS1B_UART_LCR_OFFSET (3)
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#define LS1B_UART_MCR_OFFSET (4)
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#define LS1B_UART_LSR_OFFSET (5)
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#define LS1B_UART_MSR_OFFSET (6)
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#define LS1B_UART_LSB_OFFSET (0) // 分频锁存器1
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#define LS1B_UART_MSB_OFFSET (1) // 分频锁存器2
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/* interrupt enable register */
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#define IER_IRxE 0x1 /* 接收有效数据中断使能 */
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#define IER_ITxE 0x2 /* 传输保存寄存器为空中断使能 */
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#define IER_ILE 0x4 /* 接收器线路状态中断使能 */
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#define IER_IME 0x8 /* Modem状态中断使能 */
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/* interrupt identification register */
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#define IIR_IMASK 0xf /* mask */
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#define IIR_RXTOUT 0xc /* receive timeout */
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#define IIR_RLS 0x6 /* receive line status */
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#define IIR_RXRDY 0x4 /* receive ready */
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#define IIR_TXRDY 0x2 /* transmit ready */
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#define IIR_NOPEND 0x1 /* nothing */
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#define IIR_MLSC 0x0 /* modem status */
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#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
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/* fifo control register */
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#define FIFO_ENABLE 0x01 /* enable fifo */
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#define FIFO_RCV_RST 0x02 /* reset receive fifo */
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#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
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#define FIFO_DMA_MODE 0x08 /* enable dma mode */
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#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
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#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
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#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
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#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
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// 线路控制寄存器
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/* character format control register */
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#define CFCR_DLAB 0x80 /* divisor latch */
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#define CFCR_SBREAK 0x40 /* send break */
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#define CFCR_PZERO 0x30 /* zero parity */
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#define CFCR_PONE 0x20 /* one parity */
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#define CFCR_PEVEN 0x10 /* even parity */
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#define CFCR_PODD 0x00 /* odd parity */
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#define CFCR_PENAB 0x08 /* parity enable */
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#define CFCR_STOPB 0x04 /* 2 stop bits */
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#define CFCR_8BITS 0x03 /* 8 data bits */
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#define CFCR_7BITS 0x02 /* 7 data bits */
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#define CFCR_6BITS 0x01 /* 6 data bits */
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#define CFCR_5BITS 0x00 /* 5 data bits */
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/* modem control register */
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#define MCR_LOOPBACK 0x10 /* loopback */
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#define MCR_IENABLE 0x08 /* output 2 = int enable */
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#define MCR_DRS 0x04 /* output 1 = xxx */
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#define MCR_RTS 0x02 /* enable RTS */
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#define MCR_DTR 0x01 /* enable DTR */
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/* line status register */
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#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
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#define LSR_TSRE 0x40 /* transmitter empty */
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#define LSR_TXRDY 0x20 /* transmitter ready */
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#define LSR_BI 0x10 /* break detected */
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#define LSR_FE 0x08 /* framing error */
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#define LSR_PE 0x04 /* parity error */
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#define LSR_OE 0x02 /* overrun error */
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#define LSR_RXRDY 0x01 /* receiver ready */
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#define LSR_RCV_MASK 0x1f
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// 串口模块编号
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typedef enum
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{
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LS1B_UART00 = 0, // 全功能串口UART0可以分为两个四线串口UART00和UART01
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LS1B_UART01,
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LS1B_UART1,
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LS1B_UART2,
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LS1B_UART3,
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LS1B_UART4,
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LS1B_UART5,
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LS1B_UART6,
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LS1B_UART7,
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LS1B_UART8,
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LS1B_UART9,
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LS1B_UART10,
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LS1B_UART11
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}ls1b_uart_t;
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// 串口信息
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typedef struct
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{
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ls1b_uart_t UARTx; // 串口模块编号
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unsigned int baudrate; // 波特率
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BOOL rx_enable; // 是否需要使用串口接收数据(使能接收中断)，发送默认使能
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}ls1b_uart_info_t;
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/*
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* 获取指定串口模块的基地址
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* @UARTx 串口编号
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* @ret 基地址
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*/
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void *uart_get_base(ls1b_uart_t UARTx);
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/*
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* 初始化指定的串口模块
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* @uart_info_p 串口模块信息
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*/
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void uart_init(ls1b_uart_info_t *uart_info_p);
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/*
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* 初始化串口2
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*/
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void uart2_init(void);
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/*
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* 在串口2上打印字符串
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* @str 待打印的字符串
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*/
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void uart2_print(const char *str);
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/*
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* 在调试串口打印字符串
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* @str 待打印的字符串
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*/
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void uart_debug_print(const char *str);
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/*
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* 在调试串口打印一个字符
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* @ch 待打印的字符
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*/
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void uart_debug_putc(unsigned char ch);
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/*
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* 发送一个字节
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* @uartx 串口号
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* @ch 待发送的字符串
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*/
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void uart_putc(ls1b_uart_t uartx, unsigned char ch);
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/*
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* 打印一个字符串到指定串口
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* @uartx 串口号
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* @str 待打印的字符串
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*/
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void uart_print(ls1b_uart_t uartx, const char *str);
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#endif
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